課堂1
L1 | 介紹 (PDF) Introduction (PDF)
課程目標,數位邏輯,硬體描述語言 Course Objectives, Digital Logic, Hardware Description Languages |
課堂2
L2 | 組合邏輯(PDF)
Combinational Logic (PDF)
邏輯閘,布林代數,布林代數的顯形表示 風險
Logic Gates, Boolean Algebra, Visualizations of Boolean Algebra, Hazards |
課堂3
L3 | 介紹Verilog®(組合邏輯) (PDF)
Introduction to Verilog® (Combinational Logic) (PDF)
邏輯綜合, Verilog®硬體描述語言,用Verilog®語言描述的組合邏輯,電路版
Logic Synthesis, The Verilog® Hardware Description Language, Combinational Logic in Verilog®, Testbenches |
課堂4
L4 | 時序組塊 (PDF)
Sequential Building Blocks (PDF)
用反饋,鎖存,觸發器保存狀態, 時鐘,時序限制,時鐘脈衝相位差
Preserving State with Feedback, Latches and Flip-flops, Clocks and Timing Constraints, Clock Skew |
課堂5
L5 | 簡單時序電路與Verilog® (PDF)
Simple Sequential Circuits and Verilog® (PDF)
簡單計數器, 時序電路的Verilog®實作
Simple Counters, Verilog® Implementation of Sequential Circuits |
課堂6
L6 | 有限狀態機與Verilog®實作(PDF)
Finite-State Machines and Verilog® Implementation (PDF)
亞穩態和同步,mealy 和 moore 形式, Verilog®實作,FSM實例
Metastability and Synchronization, Mealy and Moore Formalisms, Verilog® Implementations, FSM Examples |
課堂7
L7 | 記憶體(PDF)
Memories (PDF)
RAM和ROM的技術和類型,記憶體控制電路,特殊記憶體,高性能介面
Technologies, Types of RAM and ROM, Memory Controller Circuits, Specialty Memories, High-performance Interfaces |
課堂8
L8 | 運算電路(PDF)
Circuits for Arithmetic (PDF)
二進位加減,全加器的實作和性能,高速加法,帶符號加法 |
課堂9
L9 | 模擬組塊(PDF)
Analog Building Blocks (PDF)
類比輸入,高效Op-amp電路,A/D與D/A 轉換,高效A/D與D/A電路
Analog Inputs, Useful Op-amp Circuits, A/D and D/A Conversion, Useful A/D and D/A Circuits |
課堂10
L10 | 系統整合問題和主/副FSM(PDF)
System Integration Issues and Major/Minor FSM (PDF)
層次和模組,資料和控制通道, 主/副FSM, Altera的存儲模組(RAM/ROM), 設計技巧
Hierarchy and Modularity, Data and Control Paths, Major and Minor FSMs, Memory Modules (RAM/ROM) in Altera, Design Tips |
課堂11
L11 | 可重複配置邏輯(PDF - 2.0 MB)
Reconfigurable Logic (PDF - 2.0 MB)
商用零件概述,可程式化邏輯(PAL),FPGA架構, 以及軟體工具
Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools
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課堂12
L12 | 可重複配置邏輯(續)(PDF - 2.0 MB)
Reconfigurable Logic (cont.) (PDF - 2.0 MB)
商業零件概述,可程式化邏輯(PAL),FPGA 架構, 以及軟體工具
Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools
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課堂13
L13 | 影片(PDF)
Video (PDF)
顯示,同步,信號恢復,同步時序
Displays, Synchronization, Recovery of Signals, Sync Timing
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課堂14
L14 | 專題開始(PDF)
Project Kickoff (PDF)
以往6.111專題的影片,專題思路,截止日期和目標,專題指導原則,評分,非同步介面和零件對零件通訊
Video of Past 6.111 Projects, Project Ideas, Deadlines and Goals, Project Guidelines, Grading, Asynchronous Interfaces and Kit-to-kit Communication |
課堂15
L15 | 數位積體電路和系統(PDF - 2.5 MB)
Digital Integrated Circuits and Systems (PDF - 2.5 MB)
Moore定律,VLSI整合,配線和製造, 應用專用電路,微處理器,狀態和運算傳遞,重計時,並行和流水線操作
Moore's Law, VLSI Integration, Layout and Fabrication, Application-specific Circuits, Microprocessors. Behavioral and Algorithmic Transformations, Retiming, Parallelism and Pipelinling |
課堂16
L16 | 功率耗散(PDF - 1.5 MB)
Power Dissipation (PDF - 1.5 MB)
熱量和電池壽命問題,能源消耗,針對能源的電路和運算最佳化,電壓換算
Heat and Battery Life Issues, Sources of Power Dissipation, Circuit and Algorithm Optimizations for Power, Voltage Scaling |
課堂17
L17 | 馬達與位置測定(PDF)
Motor and Position Determination (PDF)
伺服,位置測量,編碼,馬達,繞組
Servos, Position Measurement, Encoders, Motors, Windings
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