Verilog for Beginners

源自於 https://esrd2014.blogspot.com/

Digital System Design using FPGA

Introduction to Xilinx ISE and Spartan 3E

Getting Started with the Xilinx ISE and Spartan 3E
Loading bitstream into the Spartan 3E

Combinatorial Circuit Design

Full Adder
4 bit Carry Ripple Adder
8 bit Magnitude Comparator
8-to-1 Multiplexer
3-to-8 Decoder
Barrel Shifter
ALU

Sequential Circuit Design

D Flip-Flop 

Last In First Out Buffer 

First In First Out Buffer 

Register File 

Synchronous Static RAM