2020年2月1日 星期六

DE2-115 16x4 Priority Encoder (Using casez )

DE2-115 16x4 Priority Encoder (Using casez )

//需 Import  pin assignments  DE2_115_pin_assignments



module Enoder_case(
  //input  CLOCK_50, // 50 MHz clock
  //input  [3:0] KEY,      // Pushbutton[3:0]
  input  [17:0] SW, // Toggle Switch[17:0]
  //output [6:0] HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7,  // Seven Segment Digits
  output [8:0] LEDG,  // LED Green
  output [17:0] LEDR   // LED Red
  // inout  [35:0] GPIO_0,GPIO_1, // GPIO Connections
  // LCD Module 16X2
  /*
  output LCD_ON, // LCD Power ON/OFF
  output LCD_BLON, // LCD Back Light ON/OFF
  output LCD_RW, // LCD Read/Write Select, 0 = Write, 1 = Read
  output LCD_EN, // LCD Enable
  output LCD_RS, // LCD Command/Data Select, 0 = Command, 1 = Data
  inout [7:0] LCD_DATA, // LCD Data bus 8 bits
  input [2:0] mess, // MESSAGE STATUS (see lcd_test)
  input [1:0] isServer // SERVER STATUS (see lcd_test)
  */
);

// All inout port turn to tri-state
//assign GPIO_0  = 36'hzzzzzzzzz;
//assign GPIO_1  = 36'hzzzzzzzzz;

// turn LCD ON
//assign LCD_ON  = 1'b1;
//assign LCD_BLON = 1'b1;

// blank unused 7-segment digits
// blank unused 7-segment digits
//assign HEX0 = 7'b111_1111;
//assign HEX1 = 7'b111_1111;
//assign HEX2 = 7'b111_1111;
//assign HEX3 = 7'b111_1111;
//assign HEX4 = 7'b111_1111;
//assign HEX5 = 7'b111_1111;
//assign HEX6 = 7'b111_1111;
//assign HEX7 = 7'b111_1111;

assign LEDR=SW;
encoder_case(LEDG[3:0],SW[15:0],SW[17] );

endmodule


//-----------------------------------------------------
// Design Name : encoder_using_case
// File Name   : encoder_using_case.v
// Function    : Encoder using Case
// Coder       : Deepak Kumar Tala
//-----------------------------------------------------
module encoder_case(
binary_out , //  4 bit binary Output
encoder_in , //  16-bit Input
enable       //  Enable for the encoder
);
output [3:0] binary_out  ;
input [15:0] encoder_in ;
input  enable ;

   
reg [3:0] binary_out ;
     
always @ (*)
begin
  if (enable==1'b1) begin
    casez (encoder_in) 
16'b0000_0000_0000_0001 : binary_out = 4'b0000;
16'b0000_0000_0000_001? : binary_out = 4'b0001;
16'b0000_0000_0000_01?? : binary_out = 4'b0010;
16'b0000_0000_0000_1??? : binary_out = 4'b0011;

16'b0000_0000_0001_???? : binary_out = 4'b0100;
16'b0000_0000_001?_???? : binary_out = 4'b0101;
16'b0000_0000_01??_???? : binary_out = 4'b0110;
16'b0000_0000_1???_???? : binary_out = 4'b0111;

16'b0000_0001_????_???? : binary_out = 4'b1000;
16'b0000_001?_????_???? : binary_out = 4'b1001;
16'b0000_01??_????_???? : binary_out = 4'b1010;
16'b0000_1???_????_???? : binary_out = 4'b1011;

16'b0001_????_????_???? : binary_out = 4'b1100;
16'b001?_????_????_???? : binary_out = 4'b1101;
16'b01??_????_????_???? : binary_out = 4'b1110;
16'b1???_????_????_???? : binary_out = 4'b1111;
    default: binary_out = 4'b0000;
   endcase  end
end

endmodule

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