2021年4月24日 星期六

HBLbits_Verilog Basic_Adder100

HBLbits_Verilog Basic_Adder100 

Create a 100-bit binary adder. The adder adds two 100-bit numbers and a carry-in to produce a 100-bit sum and carry out.


module top_module( 
    input [99:0] a, b,
    input cin,
    output cout,
    output [99:0] sum );
    
    assign {cout,sum}=a+b+cin;
endmodule

沒有留言:

張貼留言

Python Modbus 控制 ADAM-6050 18-ch Isolated Digital I/O Module

Python Modbus 控制  ADAM-6050 18-ch Isolated Digital I/O Module import tkinter as tk from tkinter import messagebox from pymodbus.client impor...