HBLbits_Verilog Basic_Gates4

 HBLbits_Verilog Basic_Gates4

Build a combinational circuit with four inputs, in[3:0].

There are 3 outputs:

• out_and: output of a 4-input AND gate.
• out_or: output of a 4-input OR gate.
• out_xor: output of a 4-input XOR gate.

module top_module( 

    input [3:0] in,

    output out_and,

    output out_or,

    output out_xor

);

    wire [3:0] in1;

    wire xor12,xor34;

    assign in1=~in;

    assign out_and=in[0]&&in[1]&&in[2]&&in[3];

    assign out_or=in[0]||in[1]||in[2]||in[3];

    assign xor12=~((in1[0]||in1[1])&&(in[0]||in[1]));

    assign xor34=~((in1[2]||in1[3])&&(in[2]||in[3]));

    assign out_xor=(((~xor12)||(~xor34))&&(xor12||xor34));

endmodule