以Verilog 設計一個數位電路 (EX1_8)--- assign --4 bit 4x1 mux 電路

以Verilog 設計一個數位電路 (EX1_8)--- assign  --4 bit 4x1 mux 電路

module Four_bit_4x1MUX( a,b,c,d, sel,out);  
          
input [3:0] a,b,c,d; // 4-bit input called a ,b,c,d 
input [1:0] sel;    //input sel used to select between a,b,c,d
output [3:0] out;   // 4-bit output based on input sel

// When sel[1] is 0, (sel[0]? b:a) is selected and when sel[1] is 1, (sel[0] ? d:c) is taken
// When sel[0] is 0, a is sent to output, else b and when sel[0] is 0, c is sent to output, else d

assign out = sel[1] ? (sel[0] ? d : c) : (sel[0] ? b : a); 

endmodule

//======================

`timescale 100 ns/1 ns

module testbench;

/*

module Four_bit_4x1MUX( a,b,c,d, sel,out);            

input [3:0] a,b,c,d; // 4-bit input called a ,b,c,d 

input [1:0] sel     //input sel used to select between a,b,c,d

output [3:0] out;   // 4-bit output based on input sel

*/

reg [3:0] a,b,c,d;

reg [1:0] sel;

wire [3:0] out;

Four_bit_4x1MUX UUT( a,b,c,d, sel,out);            

initial begin

a=4'h8;  b=4'h9;  c=4'ha ; d=4'hb;

sel=2'b00;

#20;

sel=2'b01;

#20;

sel=2'b10;

#20;

sel=2'b11;

#20 ;

$stop;

end

endmodule