2020年1月29日 星期三

Altera DE2-115 LCD Test

Altera DE2-115 LCD Test "I am alex9ufo Who are you?"

 use ascii to hexdecimal https://www.binaryhexconverter.com/ascii-text-to-hex-converter
module lcdlab2(
CLOCK_50,
KEY,
LCD_RW,
LCD_EN,
LCD_RS,
LCD_DATA,
LCD_ON,
LCD_BLON
);

input CLOCK_50;
input [3:0]KEY;
output LCD_RW, LCD_EN, LCD_RS, LCD_ON, LCD_BLON;
output [8:0]LCD_DATA;

assign LCD_RW = rw;
assign LCD_EN = CLK_LCD;
assign LCD_RS = rs;
assign LCD_ON = 1;
assign LCD_BLON = 1;
assign LCD_DATA = data;


/*共14???：1?空???，9??置??，?行??包括地址与?据共?4???*/
parameter s_idle         = 4'd0;
parameter s_clear        = 4'd1;
parameter s_cursor       = 4'd2;
parameter s_inputmode    = 4'd3;
parameter s_switchmode   = 4'd4;
parameter s_shiftmode    = 4'd5;
parameter s_setfunction  = 4'd6;
parameter s_setgeneraddr = 4'd7;
parameter s_setdataaddr1 = 4'd8;
parameter s_readbasy     = 4'd9;
parameter s_writecgram1  = 4'd10;
parameter s_readram      = 4'd11;
parameter s_setdataaddr2 = 4'd12;
parameter s_writecgram2  = 4'd13;

parameter space = 8'b0010_0000;

parameter CAPITAL_A = 8'b0100_0001;
parameter CAPITAL_B = 8'b0100_0010;
parameter CAPITAL_C = 8'b0100_0011;
parameter CAPITAL_D = 8'b0100_0100;
parameter CAPITAL_E = 8'b0100_0101;
parameter CAPITAL_F = 8'b0100_0110;
parameter CAPITAL_G = 8'b0100_0111;
parameter CAPITAL_H = 8'b0100_1000;
parameter CAPITAL_I = 8'b0100_1001;
parameter CAPITAL_J = 8'b0100_1010;
parameter CAPITAL_K = 8'b0100_1011;
parameter CAPITAL_L = 8'b0100_1100;
parameter CAPITAL_M = 8'b0100_1101;
parameter CAPITAL_N = 8'b0100_1110;
parameter CAPITAL_O = 8'b0100_1111;
parameter CAPITAL_P = 8'b0101_0001;
parameter CAPITAL_Q = 8'b0101_0001;
parameter CAPITAL_R = 8'b0101_0010;
parameter CAPITAL_S = 8'b0101_0011;
parameter CAPITAL_T = 8'b0101_0100;
parameter CAPITAL_U = 8'b0101_0101;
parameter CAPITAL_V = 8'b0101_0110;
parameter CAPITAL_W = 8'b0101_0111;
parameter CAPITAL_X = 8'b0101_1000;
parameter CAPITAL_Y = 8'b0101_1001;
parameter CAPITAL_Z = 8'b0101_1010;

parameter LOWERCASE_a = 8'b0110_0001;
parameter LOWERCASE_b = 8'b0110_0010;
parameter LOWERCASE_c = 8'b0110_0011;
parameter LOWERCASE_d = 8'b0110_0100;
parameter LOWERCASE_e = 8'b0110_0101;
parameter LOWERCASE_f = 8'b0110_0110;
parameter LOWERCASE_g = 8'b0110_0111;
parameter LOWERCASE_h = 8'b0110_1000;
parameter LOWERCASE_i = 8'b0110_1001;
parameter LOWERCASE_j = 8'b0110_1010;
parameter LOWERCASE_k = 8'b0110_1011;
parameter LOWERCASE_l = 8'b0110_1100;
parameter LOWERCASE_m = 8'b0110_1101;
parameter LOWERCASE_n = 8'b0110_1110;
parameter LOWERCASE_o = 8'b0110_1111;
parameter LOWERCASE_p = 8'b0111_0001;
parameter LOWERCASE_q = 8'b0111_0001;
parameter LOWERCASE_r = 8'b0111_0010;
parameter LOWERCASE_s = 8'b0111_0011;
parameter LOWERCASE_t = 8'b0111_0100;
parameter LOWERCASE_u = 8'b0111_0101;
parameter LOWERCASE_v = 8'b0111_0110;
parameter LOWERCASE_w = 8'b0111_0111;
parameter LOWERCASE_x = 8'b0111_1000;
parameter LOWERCASE_y = 8'b0111_1001;
parameter LOWERCASE_z = 8'b0111_1010;

parameter num_0 = 8'h30;
parameter num_1 = 8'h31;
parameter num_2 = 8'h32;
parameter num_3 = 8'h33;
parameter num_4 = 8'h34;
parameter num_5 = 8'h35;
parameter num_6 = 8'h36;
parameter num_7 = 8'h37;
parameter num_8 = 8'h38;
parameter num_9 = 8'h39;

parameter IDLE         = 8'bzzzz_zzzz;
parameter CLEAR        = 8'b0000_0001;  //清屏
parameter CURSOR       = 8'b0000_0010;  //光?返回
parameter INPUTMODE    = 8'b0000_0110;  //置?入模式 _01(I/D)S
parameter SWITCHMODE   = 8'b0000_1111;  //?示??控制 _1DCB
parameter SHIFTMODE    = 8'b0001_1100;  //光?或字符移位 _(S/R)(R/L)**
parameter SETFUNCTION  = 8'b0011_1100;  //置功能 00_001(DL)_NF**
parameter SETGENERADDR = 8'b0100_0000;  //置字符?生存?地址
parameter SETDATAADDR  = 8'b1000_0000;  //置?据存?器地址 起始地址

wire clk, rst;
assign clk = CLK_LCD;
assign rst = !KEY[1];

reg [3:0]state;
reg rw, rs;
reg [7:0]data;
reg [7:0]addr;
always @(posedge clk or posedge rst) begin
if (rst) begin
// reset
state <= s_idle;
data  <= 8'b0;
rw    <= 1'b0;
rs    <= 1'b0;
addr  <= 8'b1000_0000;
end
else begin
case (state)
s_idle        :begin
state <= s_clear;
data  <= IDLE;
rw    <= rw;
rs    <= rs;
end
s_clear       :begin
state <= s_inputmode;
data  <= CLEAR;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_inputmode   :begin
state <= s_switchmode;
data  <= INPUTMODE;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_switchmode  :begin
state <= s_shiftmode;
data  <= SWITCHMODE;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_shiftmode   :begin
state <= s_setfunction;
data  <= SHIFTMODE;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_setfunction :begin
state <= s_setdataaddr1;
data  <= SETFUNCTION;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_setdataaddr1:begin
state <= s_writecgram1;
data  <= addr;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_writecgram1 :begin
if (addr == 8'b1000_1111) begin
state <= s_setdataaddr2;
data  <= lcd_data(addr);
rw    <= 1'b0;
rs    <= 1'b1;
addr  <= 8'b1100_0000;
end
else begin
state <= s_writecgram1;
data  <= lcd_data(addr);
rw    <= 1'b0;
rs    <= 1'b1;
addr  <= addr + 1'b1;
end
end
s_setdataaddr2:begin
state <= s_writecgram2;
data  <= addr;
rw    <= 1'b0;
rs    <= 1'b0;
end
s_writecgram2 :begin
if (addr == 8'b1100_1111) begin
state <= s_setdataaddr1;
data  <= lcd_data(addr);
rw    <= 1'b0;
rs    <= 1'b1;
addr  <= 8'b1000_0000;
end
else begin
state <= s_writecgram2;
data  <= lcd_data(addr);
rw    <= 1'b0;
rs    <= 1'b1;
addr  <= addr + 1'b1;
end
end
default       :begin
state <= state;
data  <= data;
rw    <= rw;
rs    <= rs;
end
endcase
end
end

function [7:0]lcd_data;
input [7:0]lcd_addr;
begin
//I an alex9ufo
//Who are you ?
//
case(lcd_addr)
8'h81  :lcd_data = CAPITAL_I;

8'h83  :lcd_data = LOWERCASE_a;
8'h84  :lcd_data = LOWERCASE_m;

8'h86  :lcd_data = LOWERCASE_a;
8'h87  :lcd_data = LOWERCASE_l;
8'h88  :lcd_data = LOWERCASE_e;
8'h89  :lcd_data = LOWERCASE_x;
8'h8a  :lcd_data = num_9;
8'h8b  :lcd_data = LOWERCASE_u;
8'h8c  :lcd_data = LOWERCASE_f;
8'h8d  :lcd_data = LOWERCASE_o;

8'hc1  :lcd_data = CAPITAL_W;
8'hc2  :lcd_data = LOWERCASE_h;
8'hc3  :lcd_data = LOWERCASE_o;
8'hc5  :lcd_data = LOWERCASE_a;
8'hc6  :lcd_data = LOWERCASE_r;
8'hc7  :lcd_data = LOWERCASE_e;
8'hc9  :lcd_data = LOWERCASE_y;
8'hca  :lcd_data = LOWERCASE_o;
8'hcb  :lcd_data = LOWERCASE_u;
8'hcc  :lcd_data = 8'h3f;
default:lcd_data = space;
endcase
end
endfunction

parameter CLK_LCD_times = 19'd030000;
reg [22:0]cnt;
reg CLK_LCD;

always@(posedge CLOCK_50 or posedge rst) begin
if(rst) begin
cnt <= 19'd0;
//CLOCK_50 <= 1'b0;
end
else if(cnt == CLK_LCD_times) begin
cnt <= 19'd0;
CLK_LCD <= ~CLK_LCD;
end
else begin
cnt <= cnt+1'b1;
end
end

endmodule


//DE2_115_pin_assignments

# Copyright (C) 1991-2010 Altera Corporation
# Your use of Altera Corporation's design tools  logic functions 
# and other software and tools  and its AMPP partner logic 
# functions  and any output files from any of the foregoing 
# (including device programming or simulation files)  and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement  Altera MegaCore Function License 
# Agreement  or other applicable license agreement  including
# without limitation  that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
# Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Full Version
# File: E:\SVN\DE2_115\trunk\test\de2_115_golden_sopc\de2_115_golden_sopc.csv
# Generated on: Fri Jun 18 14:51:18 2010
# Note: The column header names should not be changed if you wish to import this .csv file into the Quartus II software.
To Direction Location I/O Bank VREF Group I/O Standard Reserved
AUD_ADCDAT Input PIN_D2 1 B1_N0 3.3-V LVTTL
AUD_ADCLRCK Bidir PIN_C2 1 B1_N0 3.3-V LVTTL
AUD_BCLK Bidir PIN_F2 1 B1_N1 3.3-V LVTTL
AUD_DACDAT Output PIN_D1 1 B1_N0 3.3-V LVTTL
AUD_DACLRCK Bidir PIN_E3 1 B1_N0 3.3-V LVTTL
AUD_XCK Output PIN_E1 1 B1_N0 3.3-V LVTTL
CLOCK2_50 Input PIN_AG14 3 B3_N0 3.3-V LVTTL
CLOCK3_50 Input PIN_AG15 4 B4_N2 3.3-V LVTTL
CLOCK_50 Input PIN_Y2 2 B2_N0 3.3-V LVTTL
DRAM_ADDR[12] Output PIN_Y7 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[11] Output PIN_AA5 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[10] Output PIN_R5 2 B2_N0 3.3-V LVTTL
DRAM_ADDR[9] Output PIN_Y6 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[8] Output PIN_Y5 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[7] Output PIN_AA7 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[6] Output PIN_W7 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[5] Output PIN_W8 2 B2_N2 3.3-V LVTTL
DRAM_ADDR[4] Output PIN_V5 2 B2_N1 3.3-V LVTTL
DRAM_ADDR[3] Output PIN_P1 1 B1_N2 3.3-V LVTTL
DRAM_ADDR[2] Output PIN_U8 2 B2_N1 3.3-V LVTTL
DRAM_ADDR[1] Output PIN_V8 2 B2_N1 3.3-V LVTTL
DRAM_ADDR[0] Output PIN_R6 2 B2_N0 3.3-V LVTTL
DRAM_BA[1] Output PIN_R4 2 B2_N0 3.3-V LVTTL
DRAM_BA[0] Output PIN_U7 2 B2_N1 3.3-V LVTTL
DRAM_CAS_N Output PIN_V7 2 B2_N1 3.3-V LVTTL
DRAM_CKE Output PIN_AA6 2 B2_N2 3.3-V LVTTL
DRAM_CLK Output PIN_AE5 3 B3_N2 3.3-V LVTTL
DRAM_CS_N Output PIN_T4 2 B2_N0 3.3-V LVTTL
DRAM_DQ[31] Bidir PIN_U1 2 B2_N0 3.3-V LVTTL
DRAM_DQ[30] Bidir PIN_U4 2 B2_N0 3.3-V LVTTL
DRAM_DQ[29] Bidir PIN_T3 2 B2_N0 3.3-V LVTTL
DRAM_DQ[28] Bidir PIN_R3 2 B2_N0 3.3-V LVTTL
DRAM_DQ[27] Bidir PIN_R2 2 B2_N0 3.3-V LVTTL
DRAM_DQ[26] Bidir PIN_R1 2 B2_N0 3.3-V LVTTL
DRAM_DQ[25] Bidir PIN_R7 2 B2_N0 3.3-V LVTTL
DRAM_DQ[24] Bidir PIN_U5 2 B2_N1 3.3-V LVTTL
DRAM_DQ[23] Bidir PIN_L7 1 B1_N2 3.3-V LVTTL
DRAM_DQ[22] Bidir PIN_M7 1 B1_N2 3.3-V LVTTL
DRAM_DQ[21] Bidir PIN_M4 1 B1_N1 3.3-V LVTTL
DRAM_DQ[20] Bidir PIN_N4 1 B1_N2 3.3-V LVTTL
DRAM_DQ[19] Bidir PIN_N3 1 B1_N2 3.3-V LVTTL
DRAM_DQ[18] Bidir PIN_P2 1 B1_N2 3.3-V LVTTL
DRAM_DQ[17] Bidir PIN_L8 1 B1_N2 3.3-V LVTTL
DRAM_DQ[16] Bidir PIN_M8 1 B1_N2 3.3-V LVTTL
DRAM_DQ[15] Bidir PIN_AC2 2 B2_N1 3.3-V LVTTL
DRAM_DQ[14] Bidir PIN_AB3 2 B2_N1 3.3-V LVTTL
DRAM_DQ[13] Bidir PIN_AC1 2 B2_N1 3.3-V LVTTL
DRAM_DQ[12] Bidir PIN_AB2 2 B2_N0 3.3-V LVTTL
DRAM_DQ[11] Bidir PIN_AA3 2 B2_N1 3.3-V LVTTL
DRAM_DQ[10] Bidir PIN_AB1 2 B2_N0 3.3-V LVTTL
DRAM_DQ[9] Bidir PIN_Y4 2 B2_N1 3.3-V LVTTL
DRAM_DQ[8] Bidir PIN_Y3 2 B2_N1 3.3-V LVTTL
DRAM_DQ[7] Bidir PIN_U3 2 B2_N0 3.3-V LVTTL
DRAM_DQ[6] Bidir PIN_V1 2 B2_N0 3.3-V LVTTL
DRAM_DQ[5] Bidir PIN_V2 2 B2_N0 3.3-V LVTTL
DRAM_DQ[4] Bidir PIN_V3 2 B2_N0 3.3-V LVTTL
DRAM_DQ[3] Bidir PIN_W1 2 B2_N1 3.3-V LVTTL
DRAM_DQ[2] Bidir PIN_V4 2 B2_N0 3.3-V LVTTL
DRAM_DQ[1] Bidir PIN_W2 2 B2_N0 3.3-V LVTTL
DRAM_DQ[0] Bidir PIN_W3 2 B2_N2 3.3-V LVTTL
DRAM_DQM[3] Output PIN_N8 1 B1_N2 3.3-V LVTTL
DRAM_DQM[2] Output PIN_K8 1 B1_N2 3.3-V LVTTL
DRAM_DQM[1] Output PIN_W4 2 B2_N2 3.3-V LVTTL
DRAM_DQM[0] Output PIN_U2 2 B2_N0 3.3-V LVTTL
DRAM_RAS_N Output PIN_U6 2 B2_N1 3.3-V LVTTL
DRAM_WE_N Output PIN_V6 2 B2_N1 3.3-V LVTTL
EEP_I2C_SCLK Output PIN_D14 8 B8_N0 3.3-V LVTTL
EEP_I2C_SDAT Bidir PIN_E14 8 B8_N0 3.3-V LVTTL
ENET0_GTX_CLK Output PIN_A17 7 B7_N2 2.5 V
ENET0_INT_N Input PIN_A21 7 B7_N1 2.5 V
ENET0_LINK100 Input PIN_C14 8 B8_N0 3.3-V LVTTL
ENET0_MDC Output PIN_C20 7 B7_N1 2.5 V
ENET0_MDIO Bidir PIN_B21 7 B7_N1 2.5 V
ENET0_RST_N Output PIN_C19 7 B7_N1 2.5 V
ENET0_RX_CLK Input PIN_A15 7 B7_N2 2.5 V
ENET0_RX_COL Input PIN_E15 7 B7_N2 2.5 V
ENET0_RX_CRS Input PIN_D15 7 B7_N2 2.5 V
ENET0_RX_DATA[3] Input PIN_C15 7 B7_N2 2.5 V
ENET0_RX_DATA[2] Input PIN_D17 7 B7_N1 2.5 V
ENET0_RX_DATA[1] Input PIN_D16 7 B7_N2 2.5 V
ENET0_RX_DATA[0] Input PIN_C16 7 B7_N2 2.5 V
ENET0_RX_DV Input PIN_C17 7 B7_N1 2.5 V
ENET0_RX_ER Input PIN_D18 7 B7_N1 2.5 V
ENET0_TX_CLK Input PIN_B17 7 B7_N2 2.5 V
ENET0_TX_DATA[3] Output PIN_B19 7 B7_N1 2.5 V
ENET0_TX_DATA[2] Output PIN_A19 7 B7_N1 2.5 V
ENET0_TX_DATA[1] Output PIN_D19 7 B7_N1 2.5 V
ENET0_TX_DATA[0] Output PIN_C18 7 B7_N1 2.5 V
ENET0_TX_EN Output PIN_A18 7 B7_N1 2.5 V
ENET0_TX_ER Output PIN_B18 7 B7_N1 2.5 V
ENET1_GTX_CLK Output PIN_C23 7 B7_N0 2.5 V
ENET1_INT_N Input PIN_D24 7 B7_N0 2.5 V
ENET1_LINK100 Input PIN_D13 8 B8_N0 3.3-V LVTTL
ENET1_MDC Output PIN_D23 7 B7_N0 2.5 V
ENET1_MDIO Bidir PIN_D25 7 B7_N0 2.5 V
ENET1_RST_N Output PIN_D22 7 B7_N0 2.5 V
ENET1_RX_CLK Input PIN_B15 7 B7_N2 2.5 V
ENET1_RX_COL Input PIN_B22 7 B7_N1 2.5 V
ENET1_RX_CRS Input PIN_D20 7 B7_N1 2.5 V
ENET1_RX_DATA[3] Input PIN_D21 7 B7_N0 2.5 V
ENET1_RX_DATA[2] Input PIN_A23 7 B7_N0 2.5 V
ENET1_RX_DATA[1] Input PIN_C21 7 B7_N0 2.5 V
ENET1_RX_DATA[0] Input PIN_B23 7 B7_N0 2.5 V
ENET1_RX_DV Input PIN_A22 7 B7_N1 2.5 V
ENET1_RX_ER Input PIN_C24 7 B7_N0 2.5 V
ENET1_TX_CLK Input PIN_C22 7 B7_N0 2.5 V
ENET1_TX_DATA[3] Output PIN_C26 7 B7_N0 2.5 V
ENET1_TX_DATA[2] Output PIN_B26 7 B7_N0 2.5 V
ENET1_TX_DATA[1] Output PIN_A26 7 B7_N0 2.5 V
ENET1_TX_DATA[0] Output PIN_C25 7 B7_N0 2.5 V
ENET1_TX_EN Output PIN_B25 7 B7_N0 2.5 V
ENET1_TX_ER Output PIN_A25 7 B7_N0 2.5 V
ENETCLK_25 Input PIN_A14 8 B8_N0 3.3-V LVTTL
EX_IO[6] Bidir PIN_D9 8 B8_N1 3.3-V LVTTL
EX_IO[5] Bidir PIN_E10 8 B8_N1 3.3-V LVTTL
EX_IO[4] Bidir PIN_F14 8 B8_N0 3.3-V LVTTL
EX_IO[3] Bidir PIN_H14 8 B8_N0 3.3-V LVTTL
EX_IO[2] Bidir PIN_H13 8 B8_N0 3.3-V LVTTL
EX_IO[1] Bidir PIN_J14 8 B8_N0 3.3-V LVTTL
EX_IO[0] Bidir PIN_J10 8 B8_N1 3.3-V LVTTL
FL_ADDR[22] Output PIN_AD11 3 B3_N0 3.3-V LVTTL
FL_ADDR[21] Output PIN_AD10 3 B3_N2 3.3-V LVTTL
FL_ADDR[20] Output PIN_AE10 3 B3_N1 3.3-V LVTTL
FL_ADDR[19] Output PIN_AD12 3 B3_N0 3.3-V LVTTL
FL_ADDR[18] Output PIN_AC12 3 B3_N0 3.3-V LVTTL
FL_ADDR[17] Output PIN_AH12 3 B3_N0 3.3-V LVTTL
FL_ADDR[16] Output PIN_AA8 3 B3_N1 3.3-V LVTTL
FL_ADDR[15] Output PIN_Y10 3 B3_N2 3.3-V LVTTL
FL_ADDR[14] Output PIN_AC8 3 B3_N1 3.3-V LVTTL
FL_ADDR[13] Output PIN_AD8 3 B3_N2 3.3-V LVTTL
FL_ADDR[12] Output PIN_AA10 3 B3_N1 3.3-V LVTTL
FL_ADDR[11] Output PIN_AF9 3 B3_N1 3.3-V LVTTL
FL_ADDR[10] Output PIN_AE9 3 B3_N1 3.3-V LVTTL
FL_ADDR[9] Output PIN_AB10 3 B3_N1 3.3-V LVTTL
FL_ADDR[8] Output PIN_AB12 3 B3_N0 3.3-V LVTTL
FL_ADDR[7] Output PIN_AB13 3 B3_N0 3.3-V LVTTL
FL_ADDR[6] Output PIN_AA12 3 B3_N0 3.3-V LVTTL
FL_ADDR[5] Output PIN_AA13 3 B3_N0 3.3-V LVTTL
FL_ADDR[4] Output PIN_Y12 3 B3_N0 3.3-V LVTTL
FL_ADDR[3] Output PIN_Y14 3 B3_N0 3.3-V LVTTL
FL_ADDR[2] Output PIN_Y13 3 B3_N0 3.3-V LVTTL
FL_ADDR[1] Output PIN_AH7 3 B3_N1 3.3-V LVTTL
FL_ADDR[0] Output PIN_AG12 3 B3_N0 3.3-V LVTTL
FL_CE_N Output PIN_AG7 3 B3_N2 3.3-V LVTTL
FL_DQ[7] Bidir PIN_AF12 3 B3_N1 3.3-V LVTTL
FL_DQ[6] Bidir PIN_AH11 3 B3_N0 3.3-V LVTTL
FL_DQ[5] Bidir PIN_AG11 3 B3_N0 3.3-V LVTTL
FL_DQ[4] Bidir PIN_AF11 3 B3_N1 3.3-V LVTTL
FL_DQ[3] Bidir PIN_AH10 3 B3_N1 3.3-V LVTTL
FL_DQ[2] Bidir PIN_AG10 3 B3_N1 3.3-V LVTTL
FL_DQ[1] Bidir PIN_AF10 3 B3_N1 3.3-V LVTTL
FL_DQ[0] Bidir PIN_AH8 3 B3_N1 3.3-V LVTTL
FL_OE_N Output PIN_AG8 3 B3_N1 3.3-V LVTTL
FL_RST_N Output PIN_AE11 3 B3_N1 3.3-V LVTTL
FL_RY Input PIN_Y1 2 B2_N0 3.3-V LVTTL
FL_WE_N Output PIN_AC10 3 B3_N0 3.3-V LVTTL
FL_WP_N Output PIN_AE12 3 B3_N1 3.3-V LVTTL
GPIO[35] Bidir PIN_AG26 4 B4_N0 3.3-V LVTTL
GPIO[34] Bidir PIN_AH23 4 B4_N1 3.3-V LVTTL
GPIO[33] Bidir PIN_AH26 4 B4_N0 3.3-V LVTTL
GPIO[32] Bidir PIN_AF20 4 B4_N1 3.3-V LVTTL
GPIO[31] Bidir PIN_AG23 4 B4_N1 3.3-V LVTTL
GPIO[30] Bidir PIN_AE20 4 B4_N1 3.3-V LVTTL
GPIO[29] Bidir PIN_AF26 4 B4_N1 3.3-V LVTTL
GPIO[28] Bidir PIN_AH22 4 B4_N1 3.3-V LVTTL
GPIO[27] Bidir PIN_AE24 4 B4_N0 3.3-V LVTTL
GPIO[26] Bidir PIN_AG22 4 B4_N1 3.3-V LVTTL
GPIO[25] Bidir PIN_AE25 4 B4_N1 3.3-V LVTTL
GPIO[24] Bidir PIN_AH25 4 B4_N1 3.3-V LVTTL
GPIO[23] Bidir PIN_AD25 4 B4_N0 3.3-V LVTTL
GPIO[22] Bidir PIN_AG25 4 B4_N1 3.3-V LVTTL
GPIO[21] Bidir PIN_AD22 4 B4_N0 3.3-V LVTTL
GPIO[20] Bidir PIN_AF22 4 B4_N0 3.3-V LVTTL
GPIO[19] Bidir PIN_AF21 4 B4_N1 3.3-V LVTTL
GPIO[18] Bidir PIN_AE22 4 B4_N0 3.3-V LVTTL
GPIO[17] Bidir PIN_AC22 4 B4_N0 3.3-V LVTTL
GPIO[16] Bidir PIN_AF25 4 B4_N1 3.3-V LVTTL
GPIO[15] Bidir PIN_AE21 4 B4_N1 3.3-V LVTTL
GPIO[14] Bidir PIN_AF24 4 B4_N1 3.3-V LVTTL
GPIO[13] Bidir PIN_AF15 4 B4_N2 3.3-V LVTTL
GPIO[12] Bidir PIN_AD19 4 B4_N0 3.3-V LVTTL
GPIO[11] Bidir PIN_AF16 4 B4_N2 3.3-V LVTTL
GPIO[10] Bidir PIN_AC19 4 B4_N0 3.3-V LVTTL
GPIO[9] Bidir PIN_AE15 4 B4_N2 3.3-V LVTTL
GPIO[8] Bidir PIN_AD15 4 B4_N2 3.3-V LVTTL
GPIO[7] Bidir PIN_AE16 4 B4_N2 3.3-V LVTTL
GPIO[6] Bidir PIN_AD21 4 B4_N0 3.3-V LVTTL
GPIO[5] Bidir PIN_Y16 4 B4_N0 3.3-V LVTTL
GPIO[4] Bidir PIN_AC21 4 B4_N0 3.3-V LVTTL
GPIO[3] Bidir PIN_Y17 4 B4_N0 3.3-V LVTTL
GPIO[2] Bidir PIN_AB21 4 B4_N0 3.3-V LVTTL
GPIO[1] Bidir PIN_AC15 4 B4_N2 3.3-V LVTTL
GPIO[0] Bidir PIN_AB22 4 B4_N0 3.3-V LVTTL
HEX0[6] Output PIN_H22 6 B6_N0 2.5 V
HEX0[5] Output PIN_J22 6 B6_N0 2.5 V
HEX0[4] Output PIN_L25 6 B6_N1 2.5 V
HEX0[3] Output PIN_L26 6 B6_N1 2.5 V
HEX0[2] Output PIN_E17 7 B7_N2 2.5 V
HEX0[1] Output PIN_F22 7 B7_N0 2.5 V
HEX0[0] Output PIN_G18 7 B7_N2 2.5 V
HEX1[6] Output PIN_U24 5 B5_N0 2.5 V
HEX1[5] Output PIN_U23 5 B5_N1 2.5 V
HEX1[4] Output PIN_W25 5 B5_N1 2.5 V
HEX1[3] Output PIN_W22 5 B5_N0 2.5 V
HEX1[2] Output PIN_W21 5 B5_N1 2.5 V
HEX1[1] Output PIN_Y22 5 B5_N0 2.5 V
HEX1[0] Output PIN_M24 6 B6_N2 2.5 V
HEX2[6] Output PIN_W28 5 B5_N1 2.5 V
HEX2[5] Output PIN_W27 5 B5_N1 2.5 V
HEX2[4] Output PIN_Y26 5 B5_N1 2.5 V
HEX2[3] Output PIN_W26 5 B5_N1 2.5 V
HEX2[2] Output PIN_Y25 5 B5_N1 2.5 V
HEX2[1] Output PIN_AA26 5 B5_N1 2.5 V
HEX2[0] Output PIN_AA25 5 B5_N1 2.5 V
HEX3[6] Output PIN_Y19 4 B4_N0 3.3-V LVTTL
HEX3[5] Output PIN_AF23 4 B4_N0 3.3-V LVTTL
HEX3[4] Output PIN_AD24 4 B4_N0 3.3-V LVTTL
HEX3[3] Output PIN_AA21 4 B4_N0 3.3-V LVTTL
HEX3[2] Output PIN_AB20 4 B4_N0 3.3-V LVTTL
HEX3[1] Output PIN_U21 5 B5_N0 2.5 V
HEX3[0] Output PIN_V21 5 B5_N1 2.5 V
HEX4[6] Output PIN_AE18 4 B4_N2 3.3-V LVTTL
HEX4[5] Output PIN_AF19 4 B4_N1 3.3-V LVTTL
HEX4[4] Output PIN_AE19 4 B4_N1 3.3-V LVTTL
HEX4[3] Output PIN_AH21 4 B4_N2 3.3-V LVTTL
HEX4[2] Output PIN_AG21 4 B4_N2 3.3-V LVTTL
HEX4[1] Output PIN_AA19 4 B4_N0 3.3-V LVTTL
HEX4[0] Output PIN_AB19 4 B4_N0 3.3-V LVTTL
HEX5[6] Output PIN_AH18 4 B4_N2 3.3-V LVTTL
HEX5[5] Output PIN_AF18 4 B4_N1 3.3-V LVTTL
HEX5[4] Output PIN_AG19 4 B4_N2 3.3-V LVTTL
HEX5[3] Output PIN_AH19 4 B4_N2 3.3-V LVTTL
HEX5[2] Output PIN_AB18 4 B4_N0 3.3-V LVTTL
HEX5[1] Output PIN_AC18 4 B4_N1 3.3-V LVTTL
HEX5[0] Output PIN_AD18 4 B4_N1 3.3-V LVTTL
HEX6[6] Output PIN_AC17 4 B4_N2 3.3-V LVTTL
HEX6[5] Output PIN_AA15 4 B4_N2 3.3-V LVTTL
HEX6[4] Output PIN_AB15 4 B4_N2 3.3-V LVTTL
HEX6[3] Output PIN_AB17 4 B4_N1 3.3-V LVTTL
HEX6[2] Output PIN_AA16 4 B4_N2 3.3-V LVTTL
HEX6[1] Output PIN_AB16 4 B4_N2 3.3-V LVTTL
HEX6[0] Output PIN_AA17 4 B4_N1 3.3-V LVTTL
HEX7[6] Output PIN_AA14 3 B3_N0 3.3-V LVTTL
HEX7[5] Output PIN_AG18 4 B4_N2 3.3-V LVTTL
HEX7[4] Output PIN_AF17 4 B4_N2 3.3-V LVTTL
HEX7[3] Output PIN_AH17 4 B4_N2 3.3-V LVTTL
HEX7[2] Output PIN_AG17 4 B4_N2 3.3-V LVTTL
HEX7[1] Output PIN_AE17 4 B4_N2 3.3-V LVTTL
HEX7[0] Output PIN_AD17 4 B4_N2 3.3-V LVTTL
HSMC_CLKIN0 Input PIN_AH15 4 B4_N2 3.0-V LVTTL
HSMC_CLKIN_P1 Input PIN_J27 6 B6_N2 LVDS
HSMC_CLKIN_P2 Input PIN_Y27 5 B5_N0 LVDS
HSMC_CLKOUT0 Output PIN_AD28 5 B5_N2 2.5 V
HSMC_CLKOUT_P1 Output PIN_G23 6 B6_N0 LVDS
HSMC_CLKOUT_P2 Output PIN_V23 5 B5_N1 LVDS
HSMC_D[3] Bidir PIN_AF27 5 B5_N2 2.5 V
HSMC_D[2] Bidir PIN_AE27 5 B5_N2 2.5 V
HSMC_D[1] Bidir PIN_AE28 5 B5_N2 2.5 V
HSMC_D[0] Bidir PIN_AE26 5 B5_N2 2.5 V
HSMC_RX_D_P[16] Input PIN_T21 5 B5_N0 LVDS
HSMC_RX_D_P[15] Input PIN_R22 5 B5_N0 LVDS
HSMC_RX_D_P[14] Input PIN_P21 5 B5_N0 LVDS
HSMC_RX_D_P[13] Input PIN_P25 6 B6_N2 LVDS
HSMC_RX_D_P[12] Input PIN_N25 6 B6_N2 LVDS
HSMC_RX_D_P[11] Input PIN_L21 6 B6_N0 LVDS
HSMC_RX_D_P[10] Input PIN_U25 5 B5_N0 LVDS
HSMC_RX_D_P[9] Input PIN_T25 5 B5_N0 LVDS
HSMC_RX_D_P[8] Input PIN_R25 5 B5_N0 LVDS
HSMC_RX_D_P[7] Input PIN_M25 6 B6_N2 LVDS
HSMC_RX_D_P[6] Input PIN_L23 6 B6_N1 LVDS
HSMC_RX_D_P[5] Input PIN_K25 6 B6_N1 LVDS
HSMC_RX_D_P[4] Input PIN_H25 6 B6_N1 LVDS
HSMC_RX_D_P[3] Input PIN_G25 6 B6_N0 LVDS
HSMC_RX_D_P[2] Input PIN_F26 6 B6_N1 LVDS
HSMC_RX_D_P[1] Input PIN_D26 6 B6_N0 LVDS
HSMC_RX_D_P[0] Input PIN_F24 6 B6_N0 LVDS
HSMC_TX_D_P[16] Output PIN_U22 5 B5_N0 LVDS
HSMC_TX_D_P[15] Output PIN_V27 5 B5_N1 LVDS
HSMC_TX_D_P[14] Output PIN_U27 5 B5_N0 LVDS
HSMC_TX_D_P[13] Output PIN_R27 5 B5_N0 LVDS
HSMC_TX_D_P[12] Output PIN_V25 5 B5_N1 LVDS
HSMC_TX_D_P[11] Output PIN_L27 6 B6_N2 LVDS
HSMC_TX_D_P[10] Output PIN_J25 6 B6_N1 LVDS
HSMC_TX_D_P[9] Output PIN_P27 6 B6_N2 LVDS
HSMC_TX_D_P[8] Output PIN_J23 6 B6_N0 LVDS
HSMC_TX_D_P[7] Output PIN_H23 6 B6_N0 LVDS
HSMC_TX_D_P[6] Output PIN_K21 6 B6_N0 LVDS
HSMC_TX_D_P[5] Output PIN_M27 6 B6_N2 LVDS
HSMC_TX_D_P[4] Output PIN_K27 6 B6_N1 LVDS
HSMC_TX_D_P[3] Output PIN_G27 6 B6_N1 LVDS
HSMC_TX_D_P[2] Output PIN_F27 6 B6_N1 LVDS
HSMC_TX_D_P[1] Output PIN_E27 6 B6_N1 LVDS
HSMC_TX_D_P[0] Output PIN_D27 6 B6_N0 LVDS
I2C_SCLK Output PIN_B7 8 B8_N1 3.3-V LVTTL
I2C_SDAT Bidir PIN_A8 8 B8_N1 3.3-V LVTTL
IRDA_RXD Input PIN_Y15 3 B3_N0 3.3-V LVTTL
KEY[3] Input PIN_R24 5 B5_N0 2.5 V
KEY[2] Input PIN_N21 6 B6_N2 2.5 V
KEY[1] Input PIN_M21 6 B6_N1 2.5 V
KEY[0] Input PIN_M23 6 B6_N2 2.5 V
LCD_BLON Output PIN_L6 1 B1_N2 3.3-V LVTTL
LCD_DATA[7] Bidir PIN_M5 1 B1_N2 3.3-V LVTTL
LCD_DATA[6] Bidir PIN_M3 1 B1_N1 3.3-V LVTTL
LCD_DATA[5] Bidir PIN_K2 1 B1_N1 3.3-V LVTTL
LCD_DATA[4] Bidir PIN_K1 1 B1_N1 3.3-V LVTTL
LCD_DATA[3] Bidir PIN_K7 1 B1_N1 3.3-V LVTTL
LCD_DATA[2] Bidir PIN_L2 1 B1_N2 3.3-V LVTTL
LCD_DATA[1] Bidir PIN_L1 1 B1_N2 3.3-V LVTTL
LCD_DATA[0] Bidir PIN_L3 1 B1_N1 3.3-V LVTTL
LCD_EN Output PIN_L4 1 B1_N1 3.3-V LVTTL
LCD_ON Output PIN_L5 1 B1_N1 3.3-V LVTTL
LCD_RS Output PIN_M2 1 B1_N2 3.3-V LVTTL
LCD_RW Output PIN_M1 1 B1_N2 3.3-V LVTTL
LEDG[8] Output PIN_F17 7 B7_N2 2.5 V
LEDG[7] Output PIN_G21 7 B7_N1 2.5 V
LEDG[6] Output PIN_G22 7 B7_N2 2.5 V
LEDG[5] Output PIN_G20 7 B7_N1 2.5 V
LEDG[4] Output PIN_H21 7 B7_N2 2.5 V
LEDG[3] Output PIN_E24 7 B7_N1 2.5 V
LEDG[2] Output PIN_E25 7 B7_N1 2.5 V
LEDG[1] Output PIN_E22 7 B7_N0 2.5 V
LEDG[0] Output PIN_E21 7 B7_N0 2.5 V
LEDR[17] Output PIN_H15 7 B7_N2 2.5 V
LEDR[16] Output PIN_G16 7 B7_N2 2.5 V
LEDR[15] Output PIN_G15 7 B7_N2 2.5 V
LEDR[14] Output PIN_F15 7 B7_N2 2.5 V
LEDR[13] Output PIN_H17 7 B7_N2 2.5 V
LEDR[12] Output PIN_J16 7 B7_N2 2.5 V
LEDR[11] Output PIN_H16 7 B7_N2 2.5 V
LEDR[10] Output PIN_J15 7 B7_N2 2.5 V
LEDR[9] Output PIN_G17 7 B7_N1 2.5 V
LEDR[8] Output PIN_J17 7 B7_N2 2.5 V
LEDR[7] Output PIN_H19 7 B7_N2 2.5 V
LEDR[6] Output PIN_J19 7 B7_N2 2.5 V
LEDR[5] Output PIN_E18 7 B7_N1 2.5 V
LEDR[4] Output PIN_F18 7 B7_N1 2.5 V
LEDR[3] Output PIN_F21 7 B7_N0 2.5 V
LEDR[2] Output PIN_E19 7 B7_N0 2.5 V
LEDR[1] Output PIN_F19 7 B7_N0 2.5 V
LEDR[0] Output PIN_G19 7 B7_N2 2.5 V
OTG_ADDR[1] Output PIN_C3 8 B8_N2 3.3-V LVTTL
OTG_ADDR[0] Output PIN_H7 1 B1_N0 3.3-V LVTTL
OTG_CS_N Output PIN_A3 8 B8_N2 3.3-V LVTTL
OTG_DACK_N[1] Output PIN_D4 8 B8_N2 3.3-V LVTTL
OTG_DACK_N[0] Output PIN_C4 8 B8_N2 3.3-V LVTTL
OTG_DATA[15] Bidir PIN_G4 1 B1_N0 3.3-V LVTTL
OTG_DATA[14] Bidir PIN_F3 1 B1_N0 3.3-V LVTTL
OTG_DATA[13] Bidir PIN_F1 1 B1_N1 3.3-V LVTTL
OTG_DATA[12] Bidir PIN_G3 1 B1_N0 3.3-V LVTTL
OTG_DATA[11] Bidir PIN_G2 1 B1_N1 3.3-V LVTTL
OTG_DATA[10] Bidir PIN_G1 1 B1_N1 3.3-V LVTTL
OTG_DATA[9] Bidir PIN_H4 1 B1_N0 3.3-V LVTTL
OTG_DATA[8] Bidir PIN_H3 1 B1_N0 3.3-V LVTTL
OTG_DATA[7] Bidir PIN_H6 1 B1_N0 3.3-V LVTTL
OTG_DATA[6] Bidir PIN_J7 1 B1_N1 3.3-V LVTTL
OTG_DATA[5] Bidir PIN_J3 1 B1_N1 3.3-V LVTTL
OTG_DATA[4] Bidir PIN_J4 1 B1_N1 3.3-V LVTTL
OTG_DATA[3] Bidir PIN_K3 1 B1_N1 3.3-V LVTTL
OTG_DATA[2] Bidir PIN_J5 1 B1_N1 3.3-V LVTTL
OTG_DATA[1] Bidir PIN_K4 1 B1_N1 3.3-V LVTTL
OTG_DATA[0] Bidir PIN_J6 1 B1_N1 3.3-V LVTTL
OTG_DREQ[1] Input PIN_B4 8 B8_N2 3.3-V LVTTL
OTG_DREQ[0] Input PIN_J1 1 B1_N2 3.3-V LVTTL
OTG_FSPEED Bidir PIN_C6 8 B8_N2 3.3-V LVTTL
OTG_INT[1] Input PIN_D5 8 B8_N2 3.3-V LVTTL
OTG_INT[0] Input PIN_A6 8 B8_N1 3.3-V LVTTL
OTG_LSPEED Bidir PIN_B6 8 B8_N1 3.3-V LVTTL
OTG_RD_N Output PIN_B3 8 B8_N2 3.3-V LVTTL
OTG_RST_N Output PIN_C5 8 B8_N2 3.3-V LVTTL
OTG_WR_N Output PIN_A4 8 B8_N2 3.3-V LVTTL
PS2_CLK Bidir PIN_G6 1 B1_N0 3.3-V LVTTL
PS2_CLK2 Bidir PIN_G5 1 B1_N0 3.3-V LVTTL
PS2_DAT Bidir PIN_H5 1 B1_N1 3.3-V LVTTL
PS2_DAT2 Bidir PIN_F5 1 B1_N0 3.3-V LVTTL
SD_CLK Output PIN_AE13 3 B3_N0 3.3-V LVTTL
SD_CMD Bidir PIN_AD14 3 B3_N0 3.3-V LVTTL
SD_DAT[3] Bidir PIN_AC14 3 B3_N0 3.3-V LVTTL
SD_DAT[2] Bidir PIN_AB14 3 B3_N0 3.3-V LVTTL
SD_DAT[1] Bidir PIN_AF13 3 B3_N0 3.3-V LVTTL
SD_DAT[0] Bidir PIN_AE14 3 B3_N0 3.3-V LVTTL
SD_WP_N Input PIN_AF14 3 B3_N0 3.3-V LVTTL
SMA_CLKIN Input PIN_AH14 3 B3_N0 3.3-V LVTTL
SMA_CLKOUT Output PIN_AE23 4 B4_N0 3.3-V LVTTL
SRAM_ADDR[19] Output PIN_T8 2 B2_N1 3.3-V LVTTL
SRAM_ADDR[18] Output PIN_AB8 3 B3_N2 3.3-V LVTTL
SRAM_ADDR[17] Output PIN_AB9 3 B3_N2 3.3-V LVTTL
SRAM_ADDR[16] Output PIN_AC11 3 B3_N0 3.3-V LVTTL
SRAM_ADDR[15] Output PIN_AB11 3 B3_N1 3.3-V LVTTL
SRAM_ADDR[14] Output PIN_AA4 2 B2_N1 3.3-V LVTTL
SRAM_ADDR[13] Output PIN_AC3 2 B2_N1 3.3-V LVTTL
SRAM_ADDR[12] Output PIN_AB4 2 B2_N2 3.3-V LVTTL
SRAM_ADDR[11] Output PIN_AD3 2 B2_N1 3.3-V LVTTL
SRAM_ADDR[10] Output PIN_AF2 2 B2_N2 3.3-V LVTTL
SRAM_ADDR[9] Output PIN_T7 2 B2_N0 3.3-V LVTTL
SRAM_ADDR[8] Output PIN_AF5 3 B3_N2 3.3-V LVTTL
SRAM_ADDR[7] Output PIN_AC5 2 B2_N2 3.3-V LVTTL
SRAM_ADDR[6] Output PIN_AB5 2 B2_N2 3.3-V LVTTL
SRAM_ADDR[5] Output PIN_AE6 3 B3_N2 3.3-V LVTTL
SRAM_ADDR[4] Output PIN_AB6 2 B2_N2 3.3-V LVTTL
SRAM_ADDR[3] Output PIN_AC7 3 B3_N2 3.3-V LVTTL
SRAM_ADDR[2] Output PIN_AE7 3 B3_N1 3.3-V LVTTL
SRAM_ADDR[1] Output PIN_AD7 3 B3_N2 3.3-V LVTTL
SRAM_ADDR[0] Output PIN_AB7 3 B3_N1 3.3-V LVTTL
SRAM_CE_N Output PIN_AF8 3 B3_N1 3.3-V LVTTL
SRAM_DQ[15] Bidir PIN_AG3 3 B3_N2 3.3-V LVTTL
SRAM_DQ[14] Bidir PIN_AF3 3 B3_N2 3.3-V LVTTL
SRAM_DQ[13] Bidir PIN_AE4 3 B3_N2 3.3-V LVTTL
SRAM_DQ[12] Bidir PIN_AE3 2 B2_N2 3.3-V LVTTL
SRAM_DQ[11] Bidir PIN_AE1 2 B2_N1 3.3-V LVTTL
SRAM_DQ[10] Bidir PIN_AE2 2 B2_N1 3.3-V LVTTL
SRAM_DQ[9] Bidir PIN_AD2 2 B2_N1 3.3-V LVTTL
SRAM_DQ[8] Bidir PIN_AD1 2 B2_N1 3.3-V LVTTL
SRAM_DQ[7] Bidir PIN_AF7 3 B3_N1 3.3-V LVTTL
SRAM_DQ[6] Bidir PIN_AH6 3 B3_N2 3.3-V LVTTL
SRAM_DQ[5] Bidir PIN_AG6 3 B3_N2 3.3-V LVTTL
SRAM_DQ[4] Bidir PIN_AF6 3 B3_N2 3.3-V LVTTL
SRAM_DQ[3] Bidir PIN_AH4 3 B3_N2 3.3-V LVTTL
SRAM_DQ[2] Bidir PIN_AG4 3 B3_N2 3.3-V LVTTL
SRAM_DQ[1] Bidir PIN_AF4 3 B3_N2 3.3-V LVTTL
SRAM_DQ[0] Bidir PIN_AH3 3 B3_N2 3.3-V LVTTL
SRAM_LB_N Output PIN_AD4 3 B3_N2 3.3-V LVTTL
SRAM_OE_N Output PIN_AD5 3 B3_N2 3.3-V LVTTL
SRAM_UB_N Output PIN_AC4 2 B2_N2 3.3-V LVTTL
SRAM_WE_N Output PIN_AE8 3 B3_N1 3.3-V LVTTL
SW[17] Input PIN_Y23 5 B5_N2 2.5 V
SW[16] Input PIN_Y24 5 B5_N2 2.5 V
SW[15] Input PIN_AA22 5 B5_N2 2.5 V
SW[14] Input PIN_AA23 5 B5_N2 2.5 V
SW[13] Input PIN_AA24 5 B5_N2 2.5 V
SW[12] Input PIN_AB23 5 B5_N2 2.5 V
SW[11] Input PIN_AB24 5 B5_N2 2.5 V
SW[10] Input PIN_AC24 5 B5_N2 2.5 V
SW[9] Input PIN_AB25 5 B5_N1 2.5 V
SW[8] Input PIN_AC25 5 B5_N2 2.5 V
SW[7] Input PIN_AB26 5 B5_N1 2.5 V
SW[6] Input PIN_AD26 5 B5_N2 2.5 V
SW[5] Input PIN_AC26 5 B5_N2 2.5 V
SW[4] Input PIN_AB27 5 B5_N1 2.5 V
SW[3] Input PIN_AD27 5 B5_N2 2.5 V
SW[2] Input PIN_AC27 5 B5_N2 2.5 V
SW[1] Input PIN_AC28 5 B5_N2 2.5 V
SW[0] Input PIN_AB28 5 B5_N1 2.5 V
TD_CLK27 Input PIN_B14 8 B8_N0 3.3-V LVTTL
TD_DATA[7] Input PIN_F7 8 B8_N2 3.3-V LVTTL
TD_DATA[6] Input PIN_E7 8 B8_N2 3.3-V LVTTL
TD_DATA[5] Input PIN_D6 8 B8_N2 3.3-V LVTTL
TD_DATA[4] Input PIN_D7 8 B8_N2 3.3-V LVTTL
TD_DATA[3] Input PIN_C7 8 B8_N2 3.3-V LVTTL
TD_DATA[2] Input PIN_D8 8 B8_N2 3.3-V LVTTL
TD_DATA[1] Input PIN_A7 8 B8_N1 3.3-V LVTTL
TD_DATA[0] Input PIN_E8 8 B8_N2 3.3-V LVTTL
TD_HS Input PIN_E5 8 B8_N2 3.3-V LVTTL
TD_RESET_N Output PIN_G7 8 B8_N2 3.3-V LVTTL
TD_VS Input PIN_E4 8 B8_N2 3.3-V LVTTL
UART_CTS Output PIN_G14 8 B8_N0 3.3-V LVTTL
UART_RTS Input PIN_J13 8 B8_N0 3.3-V LVTTL
UART_RXD Input PIN_G12 8 B8_N1 3.3-V LVTTL
UART_TXD Output PIN_G9 8 B8_N2 3.3-V LVTTL
VGA_B[7] Output PIN_D12 8 B8_N0 3.3-V LVTTL
VGA_B[6] Output PIN_D11 8 B8_N1 3.3-V LVTTL
VGA_B[5] Output PIN_C12 8 B8_N0 3.3-V LVTTL
VGA_B[4] Output PIN_A11 8 B8_N0 3.3-V LVTTL
VGA_B[3] Output PIN_B11 8 B8_N0 3.3-V LVTTL
VGA_B[2] Output PIN_C11 8 B8_N1 3.3-V LVTTL
VGA_B[1] Output PIN_A10 8 B8_N0 3.3-V LVTTL
VGA_B[0] Output PIN_B10 8 B8_N0 3.3-V LVTTL
VGA_BLANK_N Output PIN_F11 8 B8_N1 3.3-V LVTTL
VGA_CLK Output PIN_A12 8 B8_N0 3.3-V LVTTL
VGA_G[7] Output PIN_C9 8 B8_N1 3.3-V LVTTL
VGA_G[6] Output PIN_F10 8 B8_N1 3.3-V LVTTL
VGA_G[5] Output PIN_B8 8 B8_N1 3.3-V LVTTL
VGA_G[4] Output PIN_C8 8 B8_N1 3.3-V LVTTL
VGA_G[3] Output PIN_H12 8 B8_N1 3.3-V LVTTL
VGA_G[2] Output PIN_F8 8 B8_N2 3.3-V LVTTL
VGA_G[1] Output PIN_G11 8 B8_N1 3.3-V LVTTL
VGA_G[0] Output PIN_G8 8 B8_N2 3.3-V LVTTL
VGA_HS Output PIN_G13 8 B8_N0 3.3-V LVTTL
VGA_R[7] Output PIN_H10 8 B8_N1 3.3-V LVTTL
VGA_R[6] Output PIN_H8 8 B8_N2 3.3-V LVTTL
VGA_R[5] Output PIN_J12 8 B8_N0 3.3-V LVTTL
VGA_R[4] Output PIN_G10 8 B8_N1 3.3-V LVTTL
VGA_R[3] Output PIN_F12 8 B8_N1 3.3-V LVTTL
VGA_R[2] Output PIN_D10 8 B8_N1 3.3-V LVTTL
VGA_R[1] Output PIN_E11 8 B8_N1 3.3-V LVTTL
VGA_R[0] Output PIN_E12 8 B8_N1 3.3-V LVTTL
VGA_SYNC_N Output PIN_C10 8 B8_N0 3.3-V LVTTL
VGA_VS Output PIN_C13 8 B8_N0 3.3-V LVTTL
HSMC_CLKIN_N1 Unknown PIN_J28 6 B6_N2 LVDS
HSMC_CLKIN_N2 Unknown PIN_Y28 5 B5_N0 LVDS
HSMC_TX_D_N[0] Unknown PIN_D28 6 B6_N0 LVDS
HSMC_RX_D_N[0] Unknown PIN_F25 6 B6_N0 LVDS
HSMC_RX_D_N[1] Unknown PIN_C27 6 B6_N0 LVDS
HSMC_TX_D_N[1] Unknown PIN_E28 6 B6_N1 LVDS
HSMC_TX_D_N[2] Unknown PIN_F28 6 B6_N1 LVDS
HSMC_RX_D_N[2] Unknown PIN_E26 6 B6_N1 LVDS
HSMC_TX_D_N[3] Unknown PIN_G28 6 B6_N1 LVDS
HSMC_RX_D_N[3] Unknown PIN_G26 6 B6_N0 LVDS
HSMC_TX_D_N[4] Unknown PIN_K28 6 B6_N1 LVDS
HSMC_RX_D_N[4] Unknown PIN_H26 6 B6_N1 LVDS
HSMC_TX_D_N[5] Unknown PIN_M28 6 B6_N2 LVDS
HSMC_RX_D_N[5] Unknown PIN_K26 6 B6_N1 LVDS
HSMC_TX_D_N[6] Unknown PIN_K22 6 B6_N0 LVDS
HSMC_RX_D_N[6] Unknown PIN_L24 6 B6_N2 LVDS
HSMC_TX_D_N[7] Unknown PIN_H24 6 B6_N0 LVDS
HSMC_RX_D_N[7] Unknown PIN_M26 6 B6_N2 LVDS
HSMC_TX_D_N[8] Unknown PIN_J24 6 B6_N0 LVDS
HSMC_RX_D_N[8] Unknown PIN_R26 5 B5_N0 LVDS
HSMC_TX_D_N[9] Unknown PIN_P28 6 B6_N2 LVDS
HSMC_RX_D_N[9] Unknown PIN_T26 5 B5_N0 LVDS
HSMC_TX_D_N[10] Unknown PIN_J26 6 B6_N1 LVDS
HSMC_RX_D_N[10] Unknown PIN_U26 5 B5_N0 LVDS
HSMC_TX_D_N[11] Unknown PIN_L28 6 B6_N2 LVDS
HSMC_RX_D_N[11] Unknown PIN_L22 6 B6_N0 LVDS
HSMC_TX_D_N[12] Unknown PIN_V26 5 B5_N1 LVDS
HSMC_RX_D_N[12] Unknown PIN_N26 6 B6_N2 LVDS
HSMC_TX_D_N[13] Unknown PIN_R28 5 B5_N0 LVDS
HSMC_RX_D_N[13] Unknown PIN_P26 6 B6_N2 LVDS
HSMC_TX_D_N[14] Unknown PIN_U28 5 B5_N0 LVDS
HSMC_RX_D_N[14] Unknown PIN_R21 5 B5_N0 LVDS
HSMC_TX_D_N[15] Unknown PIN_V28 5 B5_N1 LVDS
HSMC_RX_D_N[15] Unknown PIN_R23 5 B5_N0 LVDS
HSMC_TX_D_N[16] Unknown PIN_V22 5 B5_N1 LVDS
HSMC_RX_D_N[16] Unknown PIN_T22 5 B5_N0 LVDS
HSMC_CLKOUT_N2 Unknown PIN_V24 5 B5_N1 LVDS
HSMC_CLKOUT_N1 Unknown PIN_G24 6 B6_N0 LVDS
Unknown PIN_J9
Unknown PIN_H9
Unknown PIN_J8
Unknown PIN_F4 1 B1_N0
Unknown PIN_E2 1 B1_N0
Unknown PIN_M6 1 B1_N1
Unknown PIN_P3 1 B1_N2
Unknown PIN_N7 1 B1_N2
Unknown PIN_P4 1 B1_N2
Unknown PIN_P7
Unknown PIN_P5
Unknown PIN_P8 1 B1_N2
Unknown PIN_P6 1 B1_N2
Unknown PIN_R8 1 B1_N2
Unknown PIN_Y8
Unknown PIN_AA9
Unknown PIN_Y9
Unknown PIN_Y20
Unknown PIN_AA20
Unknown PIN_Y21
Unknown PIN_P24
Unknown PIN_N22
Unknown PIN_P23
Unknown PIN_M22
Unknown PIN_P22
Unknown PIN_J21
Unknown PIN_H20
Unknown PIN_J20
Unknown PIN_K9
Unknown PIN_K11
Unknown PIN_K13
Unknown PIN_K15
Unknown PIN_K17
Unknown PIN_K19
Unknown PIN_L10
Unknown PIN_L12
Unknown PIN_L14
Unknown PIN_L16
Unknown PIN_L18
Unknown PIN_L20
Unknown PIN_M9
Unknown PIN_M11
Unknown PIN_M13
Unknown PIN_M15
Unknown PIN_M17
Unknown PIN_M19
Unknown PIN_N10
Unknown PIN_N12
Unknown PIN_N14
Unknown PIN_N16
Unknown PIN_N18
Unknown PIN_N20
Unknown PIN_P9
Unknown PIN_P11
Unknown PIN_P13
Unknown PIN_P15
Unknown PIN_P17
Unknown PIN_P19
Unknown PIN_R10
Unknown PIN_R12
Unknown PIN_R14
Unknown PIN_R16
Unknown PIN_R18
Unknown PIN_R20
Unknown PIN_T9
Unknown PIN_T11
Unknown PIN_T13
Unknown PIN_T15
Unknown PIN_T17
Unknown PIN_T19
Unknown PIN_U10
Unknown PIN_U12
Unknown PIN_U14
Unknown PIN_U16
Unknown PIN_U18
Unknown PIN_U20
Unknown PIN_V9
Unknown PIN_V11
Unknown PIN_V13
Unknown PIN_V15
Unknown PIN_V17
Unknown PIN_V19
Unknown PIN_W10
Unknown PIN_W12
Unknown PIN_W14
Unknown PIN_W16
Unknown PIN_W18
Unknown PIN_W20
Unknown PIN_B1
Unknown PIN_H1 1
Unknown PIN_K5
Unknown PIN_N1 1
Unknown PIN_N5
Unknown PIN_AA1 2
Unknown PIN_AG1 2
Unknown PIN_T1 2
Unknown PIN_T5 2
Unknown PIN_W5 2
Unknown PIN_AA11 3
Unknown PIN_AD6 3
Unknown PIN_AD9 3
Unknown PIN_AD13 3
Unknown PIN_AH2 3
Unknown PIN_AH5 3
Unknown PIN_AH9 3
Unknown PIN_AH13 3
Unknown PIN_AA18 4
Unknown PIN_AD16 4
Unknown PIN_AD20 4
Unknown PIN_AD23 4
Unknown PIN_AH16 4
Unknown PIN_AH20 4
Unknown PIN_AH24 4
Unknown PIN_AH27 4
Unknown PIN_AA28 5
Unknown PIN_AG28 5
Unknown PIN_T24 5
Unknown PIN_T28 5
Unknown PIN_W24 5
Unknown PIN_B28 6
Unknown PIN_H28 6
Unknown PIN_K24 6
Unknown PIN_N24 6
Unknown PIN_N28
Unknown PIN_A16 7
Unknown PIN_A20 7
Unknown PIN_A24
Unknown PIN_A27 7
Unknown PIN_E16 7
Unknown PIN_E20 7
Unknown PIN_E23 7
Unknown PIN_H18 7
Unknown PIN_A2 8
Unknown PIN_A5 8
Unknown PIN_A9 8
Unknown PIN_A13 8
Unknown PIN_E6 8
Unknown PIN_E9 8
Unknown PIN_E13 8
Unknown PIN_H11 8
Unknown PIN_K10
Unknown PIN_K12
Unknown PIN_K14
Unknown PIN_K16
Unknown PIN_K18
Unknown PIN_K20
Unknown PIN_L9
Unknown PIN_L11
Unknown PIN_L13
Unknown PIN_L15
Unknown PIN_L17
Unknown PIN_L19
Unknown PIN_M10
Unknown PIN_M12
Unknown PIN_M14
Unknown PIN_M16
Unknown PIN_M18
Unknown PIN_M20
Unknown PIN_N9
Unknown PIN_N11
Unknown PIN_N13
Unknown PIN_N15
Unknown PIN_N17
Unknown PIN_N19
Unknown PIN_P10
Unknown PIN_P12
Unknown PIN_P14
Unknown PIN_P16
Unknown PIN_P18
Unknown PIN_P20
Unknown PIN_R9
Unknown PIN_R11
Unknown PIN_R13
Unknown PIN_R15
Unknown PIN_R17
Unknown PIN_R19
Unknown PIN_T10
Unknown PIN_T12
Unknown PIN_T14
Unknown PIN_T16
Unknown PIN_T18
Unknown PIN_T20
Unknown PIN_U9
Unknown PIN_U11
Unknown PIN_U13
Unknown PIN_U15
Unknown PIN_U17
Unknown PIN_U19
Unknown PIN_V10
Unknown PIN_V12
Unknown PIN_V14
Unknown PIN_V16
Unknown PIN_V18
Unknown PIN_V20
Unknown PIN_W9
Unknown PIN_W11
Unknown PIN_W13
Unknown PIN_W15
Unknown PIN_W17
Unknown PIN_W19
Unknown PIN_AA2
Unknown PIN_AA27
Unknown PIN_AC6
Unknown PIN_AC9
Unknown PIN_AC13
Unknown PIN_AC16
Unknown PIN_AC20
Unknown PIN_AC23
Unknown PIN_AF1
Unknown PIN_AF28
Unknown PIN_AG2
Unknown PIN_AG5
Unknown PIN_AG9
Unknown PIN_AG13
Unknown PIN_AG16
Unknown PIN_AG20
Unknown PIN_AG24
Unknown PIN_AG27
Unknown PIN_B2
Unknown PIN_B5
Unknown PIN_B9
Unknown PIN_B13
Unknown PIN_B16
Unknown PIN_B20
Unknown PIN_B24
Unknown PIN_B27
Unknown PIN_C1
Unknown PIN_C28
Unknown PIN_F6
Unknown PIN_F9
Unknown PIN_F13
Unknown PIN_F16
Unknown PIN_F20
Unknown PIN_F23
Unknown PIN_H2
Unknown PIN_H27
Unknown PIN_J11
Unknown PIN_J18
Unknown PIN_K6
Unknown PIN_K23
Unknown PIN_N2
Unknown PIN_N6
Unknown PIN_N23
Unknown PIN_N27
Unknown PIN_T2
Unknown PIN_T6
Unknown PIN_T23
Unknown PIN_T27
Unknown PIN_W6
Unknown PIN_W23
Unknown PIN_Y11
Unknown PIN_Y18
Unknown PIN_J2
Unknown PIN_D3
Unknown PIN_B12
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