16bit Data input 因為DE2-70 只有16 SW[15:0] 所以分成2次輸入 SW[17]=1 或SW[17]=0 分別輸入A SW[15:0] 及B SW[15:0];
//------------------------------------------------
// 16-bit Comparator using 4-bit-comparator task
// filename: compare16.v
//------------------------------------------------
module comparator_16(SW, LEDR, LEDG , CLOCK_27 ,KEY ,HEX0 ,HEX1 ,HEX2,HEX3 );
input [17:0] SW; // toggle switches
input [3:0] KEY; // Push bottom
input CLOCK_27; //Clock 27MHz , 50Mhz
output [17:0] LEDR; // red LEDS
output [7:0] LEDG; // green LEDs
output [6:0] HEX0,HEX1,HEX2,HEX3; //7-segment display
// set original program input , output
// ( A, B, Yout );
// input [15:0] A ; //16-bit input A and B
// input [15:0] B ;
// output [2:0] Yout;
// Yout[2]=1'b1 -->Great than,
// Yout[1]=1'b1 --> Equal, and
//Yout[0]=1'b1 -->Less than
reg [15:0] A,B ; //16-bit input A and B
//set SW17=1 then A input , SW=0 Then B input , Enable is KEY[0]
reg [3:0] A4bit; // 4-bit data in input A
reg [3:0] B4bit; // 4-bit data in input B
reg [2:0] Yout ;
reg [6:0] HEX0;
assign LEDR=SW;
assign LEDG[3]=KEY[3];
always @( negedge KEY[3] )
begin
if (SW[17])
A<=SW[15:0]; //SW17=1 then Setting A value
else
B<=SW[15:0]; //SW17=0 then Setting B value
end
always @( A or B )
begin
A4bit = A[15:12] ;
B4bit = B[15:12];
compare4( A4bit , B4bit , Yout );
if( Yout == 3'b010 ) // A[15:12] == B[15:12]
begin
A4bit = A[11:8] ;
B4bit = B[11:8] ;
compare4( A4bit , B4bit , Yout ) ;
if( Yout == 3'b010 ) // A[15:8] == B[15:8]
begin
A4bit = A[7:4] ;
B4bit = B[7:4] ;
compare4( A4bit , B4bit , Yout ) ;
if( Yout == 3'b010 ) // A[15:4] == B[15:4]
begin
A4bit = A[3:0] ;
B4bit = B[3:0] ;
compare4( A4bit , B4bit , Yout ) ;
end
end
end
end
//=================================
always @( Yout )
begin
case (Yout)
3'b010 : HEX0=7'b0110111; //Equal pattern
3'b100 : HEX0=7'b0001001; //Great than pattern
3'b001 : HEX0=7'b1000111; //Less than pattern
default : HEX0=7'b1111111; //default pattern
endcase
end
//=================================
// Task for a 4-bit comprator
task compare4 ;
input [3:0] I_A ; //4-bit input I_A and I_B
input [3:0] I_B ;
output [2:0] S ; //S[2]=1'b1 -->Great than, S[1]=1'b1 --> Equal, and
//S[0]=1'b1 -->Less than
begin
if( I_A > I_B )
S = 3'b100 ; // Great than
else if( I_A == I_B )
S = 3'b010 ; // Equal
else
S = 3'b001 ; // Less than
end
endtask
//
endmodule
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