P6-12-1 8bit D FF 暫存器 (含KEY_ DELAY )
module Dff_KEYdelay(CLOCK_50,KEY,LEDG);
input CLOCK_50; //Clock 50MHZ
input [3:0] KEY;
output reg [7:0] LEDG;
reg [3:0] key_delay0;
reg [3:0] key_delay1;
always @ (posedge CLOCK_50)
begin
if (!key_delay0[3] && key_delay0[2]) //KEY[0] toggle LEDG[0]
LEDG[0]<= ~LEDG[0];
if (!key_delay1[3] && key_delay1[2]) //KEY[1] shift LEDG left
LEDG[7:1]<= LEDG[6:0]; //Shift left
key_delay0 <= { key_delay0[2:0],KEY[0]}; //delay for KEY[0]
key_delay1 <= { key_delay1[2:0],KEY[1]}; //delay for KEY[1]
end
endmodule

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