結果影片 http://youtu.be/VjA-otc9ViE
使用FSM有限狀態機方式設計
x | g | f | e | d | c | b | a | |||
0 | HEX0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 |
HEX1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
HEX2 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
HEX3 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 254 | |
HEX4 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 254 | |
HEX5 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 254 | |
x | g | f | e | d | c | b | a | |||
1 | HEX0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 |
HEX1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
HEX2 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 223 | |
HEX3 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 254 | |
HEX4 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 254 | |
HEX5 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
x | g | f | e | d | c | b | a | |||
2 | HEX0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 |
HEX1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
HEX2 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 207 | |
HEX3 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 254 | |
HEX4 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 | |
HEX5 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 255 |
module _7_seg(SW, LEDG , CLOCK_27 ,KEY
,HEX0 ,HEX1 ,HEX2,HEX3,
,HEX4 ,HEX5 ,HEX6,HEX7
);
input [17:0] SW; // toggle switches
input [7:0] KEY; // Push bottom
input CLOCK_27; //Clock 27MHz , 50Mhz
output [7:0] LEDG; // green LEDs
output [6:0] HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7; //7-segment display
// output [4:0] Cs; // 5位元輸出
wire Clr;
assign Clr=KEY[0];
assign HEX6=8'hff; //OFF HEX6 , HEX7
assign HEX7=8'hff;
reg [6:0] HEX0,HEX1,HEX2,HEX3,HEX4,HEX5;
reg Clk,Clk_en; // 宣告為暫存器資料
reg [24:0] Cnt; // 宣告為暫存器資料
reg [4:0] Cs, Ns; // 宣告為暫存器資料
parameter [4:0] // 宣告狀態參數, 二進制編碼
S0=5'b00000, S1=5'b00001, S2=5'b00010, S3=5'b00011,
S4=5'b00100, S5=5'b00101, S6=5'b00110, S7=5'b00111,
S8=5'b01000, S9=5'b01001, S10=5'b01010, S11=5'b01011,
S12=5'b01100, S13=5'b01101, S14=5'b01110, S15=5'b01111,
S16=5'b10000, S17=5'b10001, S18=5'b10010, S19=5'b10011;
// 除頻
always@ (posedge CLOCK_27 or negedge Clr)
begin
if(!Clr)
Cnt = 0;
else
Cnt = Cnt + 1;
//Clk = Cnt[0]; // 模擬用
Clk = Cnt[24]; // 實際電路用
end
// 取得 Clk_state, Clk_en
always@ (posedge Clk or negedge Clr)
begin
if (!Clr)
Cs = 5'b00000;
else
Cs = Ns;
end
// 決定次一狀態 Ns 與輸出 Q, 組合邏輯電路
always@ (Cs)
case (Cs)
S0 : begin
Ns = S1;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hfe;
HEX4=8'hfe;
HEX5=8'hfe;
end
S1 : begin
Ns = S2;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hdf;
HEX3=8'hfe;
HEX4=8'hfe;
HEX5=8'hff;
end
S2 : begin
Ns = S3;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hcf;
HEX3=8'hfe;
HEX4=8'hff;
HEX5=8'hff;
end
S3 : begin
Ns = S4;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hc7;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S4 : begin
Ns = S5;
HEX0=8'hff;
HEX1=8'hf7;
HEX2=8'he7;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S5 : begin
Ns = S6;
HEX0=8'hf7;
HEX1=8'hf7;
HEX2=8'hf7;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S6 : begin
Ns = S7;
HEX0=8'hf3;
HEX1=8'hf7;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S7 : begin
Ns = S8;
HEX0=8'hf1;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S8 : begin
Ns = S9;
HEX0=8'hf8;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S9 : begin
Ns = S10;
HEX0=8'hfc;
HEX1=8'hfe;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S10 : begin
Ns = S11;
HEX0=8'hfe;
HEX1=8'hfe;
HEX2=8'hfe;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hff;
end
S11 : begin
Ns = S12;
HEX0=8'hff;
HEX1=8'hfe;
HEX2=8'hfe;
HEX3=8'hfd;
HEX4=8'hff;
HEX5=8'hff;
end
S12 : begin
Ns = S13;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hfe;
HEX3=8'hf9;
HEX4=8'hff;
HEX5=8'hff;
end
S13 : begin
Ns = S14;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hf1;
HEX4=8'hff;
HEX5=8'hff;
end
S14 : begin
Ns = S15;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hf3;
HEX4=8'hf7;
HEX5=8'hff;
end
S15 : begin
Ns = S16;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hf7;
HEX4=8'hf7;
HEX5=8'hf7;
end
S16 : begin
Ns = S17;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hf7;
HEX5=8'he7;
end
S17 : begin
Ns = S18;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hc7;
end
S18 : begin
Ns = S19;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hff;
HEX5=8'hce;
end
S19 : begin
Ns = S0;
HEX0=8'hff;
HEX1=8'hff;
HEX2=8'hff;
HEX3=8'hff;
HEX4=8'hfe;
HEX5=8'hde;
end
default :
Ns=S0;
endcase
assign LEDG[4:0]=Cs; //show to LEDG
endmodule
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