Verilog Tutorial Contents

Verilog Tutorial Contents

Ch#1: Introduction
  What is Verilog?
  Introduction to Verilog
  Chip Design Flow
  Chip Abstraction Layers

Ch#2: Data Types
  Verilog Syntax
  Verilog Data types
  Verilog Scalar/Vector
  Verilog Arrays

Ch#3: Building Blocks
  Verilog Module
  Verilog Port
  Verilog Module Instantiations
  Verilog assign statements
  Verilog assign examples
  Verilog Operators
  Verilog always block
  Combo Logic with always
  Sequential Logic with always
  Verilog initial block
  Verilog in a nutshell
  Verilog generate
  Verilog Sequence Detector
  Verilog Pattern Detector

Ch#4: Behavioral modeling
  Verilog Block Statements
  Verilog Assignment Types
  Verilog Blocking/Non-blocking
  Verilog Control Flow
  Verilog for Loop
  Verilog case Statement
  Verilog Functions
  Verilog Tasks
  Verilog Parameters
  Verilog `ifdef `elsif
  Verilog Delay Control

Ch#5: Gate/Switch modeling
  Gate Level Modeling
  Gate Level Examples
  Gate Delays
  Switch Level Modeling

Ch#6: Simulation
  Verilog Simulation Basics
  Verilog Timescale
  Verilog Scheduling Regions
  Verilog Display tasks

Code Examples
  Hello World!

  Flops and Latches
  JK Flip-Flop
  D Flip-Flop
  T Flip-Flop
  D Latch

  Counters
  4-bit counter
  Ripple Counter
  Straight Ring Counter
  Johnson Counter
  Mod-N Counter
  Gray Counter

  Misc
  n-bit Shift Register
  Priority Encoder
  4x1 multiplexer
  Full adder
  Single Port RAM