4-bit Magnitude Comparator in Verilog

4-bit Magnitude Comparator   in  Verilog

//-----------------------------------------
// 4-bit Comparator  
// (if...else if...else)
//-----------------------------------------
module Comparator( a, b , eq, gt, lt);

// Port Declarations
input [3:0] a, b; //4-bit inputs
output reg eq, gt, lt;  //outputs eq:Equal, gt:Great than, lt:Less than

always @ (a or b)
 begin
   if (a==b)
    begin
     eq = 1'b1; gt = 1'b0; lt = 1'b0;
    end
  else if (a > b)
    begin
     eq = 1'b0; gt = 1'b1; lt = 1'b0;
    end
  else
    begin
     eq = 1'b0; gt = 1'b0; lt = 1'b1;
    end
 end
endmodule