http://techmasterplus.com/verilog/logicgates.php
Verilog program for Basic Logic Gates
Verilog program for Half Adder
Verilog program for Full Adder
Verilog program for 4bit Adder
Verilog program for Half Substractor
Verilog program for Full Substractor
Verilog program for 4bit Substractor
Verilog program for Carry Look Ahead Adder
Verilog program for 3:8 Decoder
Verilog program for 8:3 Encoder
Verilog program for 1:8 Demultiplxer
Verilog program for 8:1 Multiplexer
Verilog program for 8bit D Flipflop
Verilog program for T Flipflop
Verilog program for JK Flipflop
Verilog program for Equality Comparator
Verilog program for 8bit Up down counter
Verilog program for 8bit Shift Register (SIPO,PISO,PIPO)
Verilog program for Random Access Memory(RAM)
Verilog program for Programmable clock Generator
Verilog program for Finite State Machine (mealy)
Verilog program for Finite State Machine (moore)
-
python pip 不是内部或外部命令 -- 解決方法 要安裝 Pyqt5 1. 首先，開啟命令提示字元。 2. 輸入 pip3 install pyqt5 好像不能執行 ! ! 錯誤顯示 : ‘ pip3 ’ 不是內部或外部命令、可執行的程式或批... -
課程講義 下載 11/20 1) PPT 下載 + 程式下載 http://www.mediafire.com/file/cru4py7e8pptfda/106%E5%8B%A4%E7%9B%8A2-1.rar 11/27 2) PPT 下載...
-
• 認 識 PreFix、InFix、PostFix PreFix（前序式）：* + 1 2 + 3 4 InFix（中序式）： (1+2)*(3+4) PostFix（後序式）：1 2 + 3 4 + * 後 序式的運算 例如： 運算時由 後序式的...
沒有留言:
張貼留言