2012年10月11日 星期四

RS Latch Delay values can be controlled when the latch is instantiated.

Delay values can be controlled when the latch is instantiated. 
(parameter tplh=3, tphl=5) 






`timescale 1ns/100ps
module RSFF2 (SW, LEDR, LEDG);
input [17:0] SW; // toggle switches
output [17:0] LEDR; // red LEDs
output [7:0] LEDG; // green LEDs

    parameter tplh=3, tphl=5 ;
    
wire s,r,c;
wire q,q_b;

wire _s, _r;

    
assign LEDR = SW;
assign s = SW[0];
assign c = SW[1];
assign r = SW[2];

nand #(tplh,tphl) 
      g1 ( _s, s, c ),
      g2 ( _r, r, c ),
      g3 ( q, _s, q_b ),
      g4 ( q_b, _r, q );   
     
assign LEDG[0]=q;
assign LEDG[1]=q_b;

endmodule

/*

`timescale 1ns/100ps
module latch_p #(parameter tplh=3, tphl=5) 
   (input s, r, c, output q, q_b );
   wire _s, _r;

   nand #(tplh,tphl) 
      g1 ( _s, s, c ),
      g2 ( _r, r, c ),
      g3 ( q, _s, q_b ),
      g4 ( q_b, _r, q );    
endmodule

*/

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