數位IC設計入門-Verilog 4bit Full Adder

數位IC設計入門-Verilog 4bit Full Adder

//需 Import  pin assignments  DE2_115_pin_assignments

//數位IC設計入門-Verilog
//數位IC設計入門-Verilog 4bit Full Adder

module Adder_4bit(
  input  CLOCK_50, // 50 MHz clock
  input  [3:0] KEY,      // Pushbutton[3:0]
  input  [17:0] SW, // Toggle Switch[17:0]
  output [6:0] HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7,  // Seven Segment Digits
  output [8:0] LEDG,  // LED Green
  output [17:0] LEDR   // LED Red
 );
 // blank unused 7-segment digits
assign HEX0 = 7'b111_1111;
assign HEX1 = 7'b111_1111;
assign HEX2 = 7'b111_1111;
assign HEX3 = 7'b111_1111;
assign HEX4 = 7'b111_1111;
assign HEX5 = 7'b111_1111;
assign HEX6 = 7'b111_1111;
assign HEX7 = 7'b111_1111;

assign LEDR=SW;

Ripple_Full_Adder(SW[3:0],SW[7:4],SW[17],LEDG[3:0],LEDG[4]);
 //Ripple_Full_Adder (a,b,c_in , sum ,c_out);
endmodule


//Faull Adder.v---use 2 HA and 1 or gate
module Ripple_Full_Adder (a,b,c_in,sum ,c_out);
input [3:0]a,b;
input c_in;
output [3:0]sum;
output c_out;
wire w0,w1,w2;


//Full_Adder_2HAor (a,b,c_in , sum ,c_out);
Full_Adder_2HAor FA0(a[0],b[0],c_in , sum[0] ,w0);
Full_Adder_2HAor FA1(a[1],b[1],w0   , sum[1] ,w1);
Full_Adder_2HAor FA2(a[2],b[2],w1   , sum[2] ,w2);
Full_Adder_2HAor FA3(a[3],b[3],w2   , sum[3] ,c_out);

endmodule


//Faull Adder.v---use 2 HA and 1 or gate
module Full_Adder_2HAor (a,b,c_in , sum ,c_out);
input a,b,c_in;
output sum,c_out;

wire c_out1,c_out2,sum1;

Half_Adder H0(a,b,sum1,c_out1);
Half_Adder H1(c_in,sum1,sum,c_out2);
or  o1(c_out,c_out1,c_out2);
endmodule


module Half_Adder(a,b,sum,c_out);
input a,b;
output sum,c_out;
wire c;

xor  x1(sum,a,b);
nand a1(c,a,b);
not  n1(c_out,c);

endmodule