HDLBiots FSM/Fsm3

HDLBiots FSM/Fsm3

See also: State transition logic for this FSM

The following is the state transition table for a Moore state machine with one input, one output, and four states. Implement this state machine. Include an asynchronous reset that resets the FSM to state A.

State	Next state		Output
	in=0	in=1
A	A	B	0
B	C	B	0
C	A	D	0
D	C	B	1

module top_module(
    input clk,
    input in,
    input areset,
    output out); //

    parameter A=2'd0,B=2'd1,C=2'd2,D=2'd3; 
    reg [1:0] state; // Make sure state and next are big enough to hold the state encodings.
    reg [1:0] next;
    
    // This is a sequential always block
    always @(posedge clk, posedge areset) begin
if (areset) state <= A;
        else state <= next;
end

 // State transition logic

    always@(*) begin
case (state)
A: next = in ? B : A;
B: next = in ? B : C;
C: next = in ? D : A;
D: next = in ? B : C;
endcase
    end

    // Output logic
    // assign out = (state == ...);
    always@(*) begin
   case (state)
A: out = 1'b0;
B: out = 1'b0;
C: out = 1'b0;
D: out = 1'b1;
       endcase
    end  
endmodule