HBLbits_Verilog Basic_Sim/circuit3

HBLbits_Verilog Basic_Sim/circuit3

 This is a combinational circuit. Read the simulation waveforms to determine what the circuit does, then implement it.

module top_module (
    input a,
    input b,
    input c,
    input d,
    output q );//
//y = BD + BC + AD + AC
    assign q = (b&d) | (b&c) | (a&d) | (a&c);  
endmodule