P6-10-2 按一次KEY0 會使LEDG[0] 由亮變暗 或 由暗變亮
適用於DE2-70
module reg_nonBlock(CLOCK_50,KEY,LEDG);
input CLOCK_50; //Clock 50MHZ
input [3:0] KEY;
output reg [7:0] LEDG;
reg [3:0] key_delay;
always @ (posedge CLOCK_50)
begin
if (!key_delay[3] && key_delay[2])
LEDG<=~LEDG;
key_delay <= { key_delay[2:0],KEY[0]}; //delay for KEY[0]
end
endmodule
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