P6-44 8x3 Priority Encoder 適用於DE2-70

P6-44 8x3 Priority Encoder 適用於DE2-70 

並配合HEX0 7-segment display

源自於http://www.electronics-tutorials.ws/combination/comb_4.html

Priority Encoder

The Priority Encoder solves the problems mentioned above by allocating a priority level to each input. The priority encoders output corresponds to the currently active input which has the highest priority. So when an input with a higher priority is present, all other inputs with a lower priority will be ignored. The priority encoder comes in many different forms with an example of an 8-input priority encoder along with its truth table shown below.

8-to-3 Bit Priority Encoder

Priority encoders are available in standard IC form and the TTL 74LS148 is an 8-to-3 bit priority encoder which has eight active LOW (logic "0") inputs and provides a 3-bit code of the highest ranked input at its output. Priority encoders output the highest order input first for example, if input lines "D2", "D3" and "D5" are applied simultaneously the output code would be for input "D5" ("101") as this has the highest order out of the 3 inputs. Once input "D5" had been removed the next highest output code would be for input "D3" ("011"), and so on.

The truth table for a 8-to-3 bit priority encoder is given as:

Digital Inputs								Binary Output
D7	D6	D5	D4	D3	D2	D1	D0	Q2	Q1	Q0
0	0	0	0	0	0	0	1	0	0	0
0	0	0	0	0	0	1	X	0	0	1
0	0	0	0	0	1	X	X	0	1	0
0	0	0	0	1	X	X	X	0	1	1
0	0	0	1	X	X	X	X	1	0	0
0	0	1	X	X	X	X	X	1	0	1
0	1	X	X	X	X	X	X	1	1	0
1	X	X	X	X	X	X	X	1	1	1

From this truth table, the Boolean expression for the encoder above with inputs D₀ to D₇ and outputsQ₀, Q₁, Q₂ is given as:

Output Q₀

Output Q₁

Output Q₂

Then the final Boolean expression for the priority encoder including the zero inputs is defined as:

//------------------------------------
//8 to 3 encoder using casex statement
//Filename : encod8_3_casex.v
//------------------------------------

module encode_8x3(SW, LEDR, LEDG , CLOCK_27 ,KEY ,HEX0 ,HEX1 ,HEX2,HEX3 );

input  [17:0] SW; // toggle switches
input  [7:0] KEY;     // Push bottom
input  CLOCK_27; //Clock 27MHz , 50Mhz

output [17:0] LEDR; // red  LEDS   
  output [7:0] LEDG; // green LEDs
    
    output [6:0] HEX0,HEX1,HEX2,HEX3; //7-segment display
    
  
//set original program input , output 

//(y,i);
//output [2:0] y;
//input [7:0] i;

reg [2:0] y;
    wire [7:0] i;
     
    
    wire [7:0] segout;
        
    //mapping to hardware 
    assign LEDR = SW;
    
    assign i=SW[7:0];


always @ (i)
begin
casex (i)
8'b???????1: y = 3'd000;
8'b??????10: y = 3'd001;
8'b?????100: y = 3'd010;
8'b????1000: y = 3'd011;
8'b???10000: y = 3'd100;
8'b??100000: y = 3'd101;
8'b?1000000: y = 3'd110;
8'b10000000: y = 3'd111;
default :    y=3'bzzz;
endcase
end 

assign LEDG[2:0]=y ;

   //module _7seg(hex , seg);
    _7seg UUT1(.hex({1'b0,y}),
               .seg(segout));
    
    assign HEX0=segout[6:0];
     
endmodule

//-----------------------------------------
//Common-cathod seven segment display
//using case.....endcase statement
//Filename : sevenseg_case.v
//----------------------------------------- 
module _7seg(hex , seg);

    input  [3:0] hex;
    output [7:0] seg;
    reg    [7:0] seg;
    
        

// segment encoding
//      0
//     ---  
//  5 |   | 1
//     ---   <- 6
//  4 |   | 2
//     ---
//      3

always @(hex)
begin
case (hex)
       // Dot point is always disable
       4'b0001 : seg = 8'b11111001;   //1 = F9H
       4'b0010 : seg = 8'b10100100;   //2 = A4H
       4'b0011 : seg = 8'b10110000;   //3 = B0H
       4'b0100 : seg = 8'b10011001;   //4 = 99H
       4'b0101 : seg = 8'b10010010;   //5 = 92H
       4'b0110 : seg = 8'b10000010;   //6 = 82H
       4'b0111 : seg = 8'b11111000;   //7 = F8H
       4'b1000 : seg = 8'b10000000;   //8 = 80H
       4'b1001 : seg = 8'b10010000;   //9 = 90H
       4'b1010 : seg = 8'b10001000;   //A = 88H
       4'b1011 : seg = 8'b10000011;   //b = 83H
       4'b1100 : seg = 8'b11000110;   //C = C6H
       4'b1101 : seg = 8'b10100001;   //d = A1H
       4'b1110 : seg = 8'b10000110;   //E = 86H
       4'b1111 : seg = 8'b10001110;   //F = 8EH
       default : seg = 8'b11000000;   //0 = C0H
     endcase
   end
   

endmodule