Multipliers & Pipelining

Multipliers & Pipelining

8 x 8 multiplier using ADD/SHIFT method

8 x 8 multiplier
module multiplicat(a,b,result);
input [7:0] a;
input [7:0] b;
output [15:0] result;
wire [15:0] a1,a2,a3,a4,a5,a6,a7,a8;
assign a1=(b[0]==1′b1) ? {8′b00000000 , a } : 16′b0000000000000000;
assign a2=(b[1]==1′b1) ? {7′b0000000 , a , 1′b0} : 16′b0000000000000000;
assign a3=(b[2]==1′b1) ? {6′b000000 , a , 2′b00} : 16′b0000000000000000;
assign a4=(b[3]==1′b1) ? {5′b00000 , a , 3′b000} : 16′b0000000000000000;
assign a5=(b[4]==1′b1) ? {4′b0000 , a , 4′b0000} : 16′b0000000000000000;
assign a6=(b[5]==1′b1) ? {3′b000 , a , 5′b00000} : 16′b0000000000000000;
assign a7=(b[6]==1′b1) ? {2′b00 , a , 6′b000000} : 16′b0000000000000000;
assign a8=(b[7]==1′b1) ? {1′b0 , a , 7′b0000000} : 16′b0000000000000000;
assign result = a1+a2+a3+a4+a5+a6+a7+a8;
endmodule
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電子學上課資料(6)

電子學ch04-D  電子學ch05-A

http://www.4shared.com/office/FzxA-L4G/CH04-D_12_16_.html?

http://www.4shared.com/web/preview/doc/cnvikg0J?

附有致能的上下數計數器MOD10 ----適用於DE2-70

l

附有致能的上下數計數器

根據「UP」來做 +1/-1, 附有致能的 mode-10 上下數計數器

pEN='0' , D=「正反器的輸出」所以沒有變化

pEN='1' 且「UP」='1' , D=「+1 電路」輸出會遞增

pEN='1' 且「UP」='0' , D=「-1 電路」輸出會遞減

//RESET --> KEY[0]

//Enable ==>SW[17]
//UP/DN ==>SW[0]

//Clock ==>KEY[1]

//Output LED[3:0]

module up_dn_MOD10(SW,KEY,LEDR,CLOCK_50);

 input [17:0]SW;

 input [3:0]KEY;

 input CLOCK_50;

 output [17:0]LEDR;

 EN_UDCNT10 ( .RESET_B(KEY[0]), 

 .CLK(KEY[1]), 

 .EN(SW[17]), 

 .UP(SW[0]), 

 .Q(LEDR[3:0]) );

 endmodule

/* EN_UDCNT10 */

module EN_UDCNT10 ( RESET_B, CLK, EN, UP, Q );

input RESET_B, CLK, EN, UP;

output [3:0] Q;

reg [3:0] Q;

always @( posedge CLK or negedge RESET_B  )

if ( !RESET_B )

Q <= 0;

else if ( EN )

if ( UP ) // COUNT UP

if ( Q == 9 )

Q <= 0;

else 

Q <= Q + 1;

else // COUNT DOWN

if ( Q == 0 )

Q <= 9;

else 

Q <= Q - 1;

endmodule

串列輸入並列輸出移位暫存器--8bits 適用於DE2-70-

串列輸入並列輸出移位暫存器(SIPO)

//RESET --> KEY[0]
//Serial_IN Data ==> SW[0]
//Enable ==>SW[17]
//Clock ==>KEY[1]
//Output LED[7:0]


module _8bit_Sin_Pout(SW,KEY,LEDR,CLOCK_50);
input [17:0]SW;
input [3:0]KEY;
input CLOCK_50;
output [17:0]LEDR;

EN_SIN_POUT_SHIFT ( .RESET_B(KEY[0]),
.IN(SW[0]),
.CLK(KEY[1]),
.EN(SW[17]),
.Q(LEDR[7:0]) );


endmodule



/* EN_SIN_POUT_SHIFT */
module EN_SIN_POUT_SHIFT ( RESET_B, IN, CLK, EN, Q );
input RESET_B, CLK, IN, EN;
output [7:0] Q;
reg [7:0] Q;
always @( negedge CLK or negedge RESET_B  )
if ( !RESET_B )
Q <= 0;
else if ( EN )
Q <= {Q,IN};
endmodule

附有致能的暫存器--適用於DE2-70

附有致能的暫存器

//Clock==> CLOCK_50 ;

//Q ==> LEDR[3:0] ;

//Reset==> KEY[0];

//Enable ==>SW[17];

module Ena_REG4(SW,KEY,LEDR,CLOCK_50);

input [17:0]SW;

input  [3:0]KEY;

input CLOCK_50;

output [17:0]LEDR;

EN_REG4 ( .CLR_B(KEY[0]), 

.D(SW[3:0]),

.CLK(CLOCK_50), 

.EN(SW[17]), 

.Q(LEDR[3:0]));

endmodule

/* EN_REG4 */

module EN_REG4 ( CLR_B, D, CLK, EN, Q );

input CLR_B, CLK, EN;

input [3:0] D;

output [3:0] Q;

reg [3:0] Q;

always @( posedge CLK or negedge CLR_B  )

if ( !CLR_B )

Q <= 0;

else if ( EN )

Q <= D;

endmodule

8 bits 二進位加法器 適用於DE2-70

module _8bit_adder(SW,LEDR);
 input [17:0]SW;
 output [17:0]LEDR ;

adder8 (.S(LEDR[7:0]),    //Sum-> LEDR[7:0] 8bitd
       .Cout(LEDR[8]),       //Carry_out -->LEDR[8]
       .A(SW[15:8]),          //A 8bit input
       .B(SW[7:0]),            //B 8bit inpur
       .Cin(SW[17]));         // Carry in SW[17]

endmodule



//****8bits Binary Adder******
module adder8(S, Cout, A, B, Cin);
  output [7:0] S;   //8-bit sum
  output Cout;    //Carry out
  input [7:0] A, B; //8-bit Inputs A , B 
  input Cin;    //Carry in

 //Assign the sum of (A+B+Cin) to Cout and Sum
 assign {Cout, S} = A + B + Cin;
endmodule