Division

1. Division
   • Division is another example of combining simple logic function to make a more complex  circuit.  Note that the method shown below ignores the divide-by-0 condition.  (see also Multipliers and dividers)
   • Algorithm 1: attempt subtraction
     • In calculating A / B, the divisor B is repeatedly subtracted from the digits of the dividend (A), after being multiplied either with ’1′ or with ’0′.  This multiplication bit (’1′ or ’0′) is selected for each subtraction step in such a manner that the subtraction result is not negative.  The division result is composed from all the successive multiplication bits while the remainder is the result of the last subtraction step.
     • This algorithm can be implemented by a series of subtractors.  Each subtractor calculates the difference between two input numbers, but if the result is negative the operation is canceled and replaced with a subtraction of zero.
     • Each divider module:
       • contains a 1-bit subtractor with the usual inputs A, B and L_i and outputs D and L_o.
       • the output select (OS) signal selects between bit X and A-B.  The signal is connected to the loan output (Lo) of the most significant 1-bit subtractor.
         • 0, means subtraction result was positive → D’ = D.
         • 1, means subtraction result was negative → D’ = X.
       • Inside each divider cell the OS signal selects between bitA and A-B.
       • The outputs can be expressed as a function of the inputs as in:
         
     • The complete division can therefore be implemented by a matrix of divider cells connected on rows and columns as shown in figure on the right.
     • Each row performs one multiplication-and-subtraction cycle where the multiplication bit is supplied by the NOT logic gate at the end of each row.  (also see “Combinational arithmetic“)
       
     • The number of gates increases with the square width of the numbers being divided.  This limits its use to designs where bit-width is relatively small, typically around 16 bits or below.